[PATCH] D28922: [LoadCombine] Fix combining of loads which span an aliasing store.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

See also https://reviews.llvm.org/D21496.

Special-casing store instructions doesn't make any sense; any instruction which writes to memory has the same properties here.


Repository:
  rL LLVM

https://reviews.llvm.org/D28922