[PATCH] D25914: Redo store splitting in CodeGenPrepare

[Chandler Carruth via llvm-commits]

chandlerc added inline comments.


================
Comment at: lib/CodeGen/CodeGenPrepare.cpp:5218-5233
+  if (!OR || OR->getOpcode() != Instruction::Or ||
+      OR->getParent() != SI.getParent())
+    return false;
+
+  // Match SHL operand and get Lower and Higher parts of Val.
+  Value *Op1 = OR->getOperand(0);
+  Value *Op2 = OR->getOperand(1);
----------------
Have you looked at doing this with the IR pattern match library? (I should have mentioned this earlier, sorry.) Check out the PatternMatch.h header.

Something like:

  unsigned HalfValBitSize = ...;
  Value *Lo, *Hi;
  if (match(SI.getValueOperand(),
            m_c_Or(m_OneUse(m_Shl(m_ZExt(m_Value(Hi)), m_SpecificInt(HalfValBitSize))),
                   m_ZExt(m_Value(Lo)))))

I forget the exact syntax for matching zero extends, but I think you can capture most of this in a very small number of lines of code.


================
Comment at: lib/CodeGen/CodeGenPrepare.cpp:5219
+  if (!OR || OR->getOpcode() != Instruction::Or ||
+      OR->getParent() != SI.getParent())
+    return false;
----------------
Why not go ahead and handle cases within a BB?


Repository:
  rL LLVM

https://reviews.llvm.org/D25914