[PATCH] D26257: [AVX512][MS-compatability][llvm] Amending vpmultishiftqb
coby via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 20 09:29:55 PST 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL287501: The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it. (authored by coby).
Changed prior to commit:
https://reviews.llvm.org/D26257?vs=78658&id=78661#toc
Repository:
rL LLVM
https://reviews.llvm.org/D26257
Files:
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
llvm/trunk/test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
Index: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td
@@ -3942,10 +3942,10 @@
AVX512BIBase, EVEX_4V;
defm rmb : AVX512_maskable<opc, MRMSrcMem, _Dst, (outs _Dst.RC:$dst),
- (ins _Src.RC:$src1, _Dst.ScalarMemOp:$src2),
+ (ins _Src.RC:$src1, _Brdct.ScalarMemOp:$src2),
OpcodeStr,
"${src2}"##_Brdct.BroadcastStr##", $src1",
- "$src1, ${src2}"##_Dst.BroadcastStr,
+ "$src1, ${src2}"##_Brdct.BroadcastStr,
(_Dst.VT (OpNode (_Src.VT _Src.RC:$src1), (bitconvert
(_Brdct.VT (X86VBroadcast
(_Brdct.ScalarLdFrag addr:$src2)))))),
Index: llvm/trunk/test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
===================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
+++ llvm/trunk/test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
@@ -0,0 +1,37 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512vl,+avx512vbmi -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vpmultishiftqb xmm1, xmm2, qword ptr [rcx]{1to2}
+// CHECK: encoding: [0x62,0xf2,0xed,0x18,0x83,0x09]
+ vpmultishiftqb xmm1, xmm2, qword ptr [rcx]{1to2}
+
+// CHECK: vpmultishiftqb xmm1 {k1}, xmm2, qword ptr [rcx]{1to2}
+// CHECK: encoding: [0x62,0xf2,0xed,0x19,0x83,0x09]
+ vpmultishiftqb xmm1 {k1}, xmm2, qword ptr [rcx]{1to2}
+
+// CHECK: vpmultishiftqb xmm1 {k1} {z}, xmm2, qword ptr [rcx]{1to2}
+// CHECK: encoding: [0x62,0xf2,0xed,0x99,0x83,0x09]
+ vpmultishiftqb xmm1 {k1} {z}, xmm2, qword ptr [rcx]{1to2}
+
+// CHECK: vpmultishiftqb ymm1, ymm2, qword ptr [rcx]{1to4}
+// CHECK: encoding: [0x62,0xf2,0xed,0x38,0x83,0x09]
+ vpmultishiftqb ymm1, ymm2, qword ptr [rcx]{1to4}
+
+// CHECK: vpmultishiftqb ymm1 {k1}, ymm2, qword ptr [rcx]{1to4}
+// CHECK: encoding: [0x62,0xf2,0xed,0x39,0x83,0x09]
+ vpmultishiftqb ymm1 {k1}, ymm2, qword ptr [rcx]{1to4}
+
+// CHECK: vpmultishiftqb ymm1 {k1} {z}, ymm2, qword ptr [rcx]{1to4}
+// CHECK: encoding: [0x62,0xf2,0xed,0xb9,0x83,0x09]
+ vpmultishiftqb ymm1 {k1} {z}, ymm2, qword ptr [rcx]{1to4}
+
+// CHECK: vpmultishiftqb zmm1, zmm2, qword ptr [rcx]{1to8}
+// CHECK: encoding: [0x62,0xf2,0xed,0x58,0x83,0x09]
+ vpmultishiftqb zmm1, zmm2, qword ptr [rcx]{1to8}
+
+// CHECK: vpmultishiftqb zmm1 {k1}, zmm2, qword ptr [rcx]{1to8}
+// CHECK: encoding: [0x62,0xf2,0xed,0x59,0x83,0x09]
+ vpmultishiftqb zmm1 {k1}, zmm2, qword ptr [rcx]{1to8}
+
+// CHECK: vpmultishiftqb zmm1 {k1} {z}, zmm2, qword ptr [rcx]{1to8}
+// CHECK: encoding: [0x62,0xf2,0xed,0xd9,0x83,0x09]
+ vpmultishiftqb zmm1 {k1} {z}, zmm2, qword ptr [rcx]{1to8}
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