[PATCH] D26257: [AVX512][MS-compatability][llvm] Amending vpmultishiftqb

[coby via llvm-commits]

coby retitled this revision from "[AVX512][llvm] Amending vpmultishiftqb" to "[AVX512][MS-compatability][llvm] Amending vpmultishiftqb".
coby updated the summary for this revision.
coby updated this revision to Diff 78658.
coby added a comment.

1. congregate patch to its agreed-upon set of changes
2. emphasize issue via a dedicated test


Repository:
  rL LLVM

https://reviews.llvm.org/D26257

Files:
  lib/Target/X86/X86InstrAVX512.td
  test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s


Index: lib/Target/X86/X86InstrAVX512.td
===================================================================
--- lib/Target/X86/X86InstrAVX512.td
+++ lib/Target/X86/X86InstrAVX512.td
@@ -3942,10 +3942,10 @@
                         AVX512BIBase, EVEX_4V;
 
   defm rmb : AVX512_maskable<opc, MRMSrcMem, _Dst, (outs _Dst.RC:$dst),
-                    (ins _Src.RC:$src1, _Dst.ScalarMemOp:$src2),
+                    (ins _Src.RC:$src1, _Brdct.ScalarMemOp:$src2),
                     OpcodeStr,
                     "${src2}"##_Brdct.BroadcastStr##", $src1",
-                     "$src1, ${src2}"##_Dst.BroadcastStr,
+                     "$src1, ${src2}"##_Brdct.BroadcastStr,
                     (_Dst.VT (OpNode (_Src.VT _Src.RC:$src1), (bitconvert
                                  (_Brdct.VT (X86VBroadcast
                                           (_Brdct.ScalarLdFrag addr:$src2)))))),
Index: test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
===================================================================
--- test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
+++ test/MC/X86/intel-syntax-x86-avx512vbmi_vl.s
@@ -0,0 +1,37 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512vl,+avx512vbmi -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK:  vpmultishiftqb xmm1, xmm2, qword ptr [rcx]{1to2}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x18,0x83,0x09]
+          vpmultishiftqb xmm1, xmm2, qword ptr [rcx]{1to2}
+
+// CHECK:  vpmultishiftqb xmm1 {k1}, xmm2, qword ptr [rcx]{1to2}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x19,0x83,0x09]
+          vpmultishiftqb xmm1 {k1}, xmm2, qword ptr [rcx]{1to2}
+
+// CHECK:  vpmultishiftqb xmm1 {k1} {z}, xmm2, qword ptr [rcx]{1to2}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x99,0x83,0x09]
+          vpmultishiftqb xmm1 {k1} {z}, xmm2, qword ptr [rcx]{1to2}
+
+// CHECK:  vpmultishiftqb ymm1, ymm2, qword ptr [rcx]{1to4}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x38,0x83,0x09]
+          vpmultishiftqb ymm1, ymm2, qword ptr [rcx]{1to4}
+
+// CHECK:  vpmultishiftqb ymm1 {k1}, ymm2, qword ptr [rcx]{1to4}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x39,0x83,0x09]
+          vpmultishiftqb ymm1 {k1}, ymm2, qword ptr [rcx]{1to4}
+
+// CHECK:  vpmultishiftqb ymm1 {k1} {z}, ymm2, qword ptr [rcx]{1to4}
+// CHECK:  encoding: [0x62,0xf2,0xed,0xb9,0x83,0x09]
+          vpmultishiftqb ymm1 {k1} {z}, ymm2, qword ptr [rcx]{1to4}
+
+// CHECK:  vpmultishiftqb zmm1, zmm2, qword ptr [rcx]{1to8}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x58,0x83,0x09]
+          vpmultishiftqb zmm1, zmm2, qword ptr [rcx]{1to8}
+
+// CHECK:  vpmultishiftqb zmm1 {k1}, zmm2, qword ptr [rcx]{1to8}
+// CHECK:  encoding: [0x62,0xf2,0xed,0x59,0x83,0x09]
+          vpmultishiftqb zmm1 {k1}, zmm2, qword ptr [rcx]{1to8}
+
+// CHECK:  vpmultishiftqb zmm1 {k1} {z}, zmm2, qword ptr [rcx]{1to8}
+// CHECK:  encoding: [0x62,0xf2,0xed,0xd9,0x83,0x09]
+          vpmultishiftqb zmm1 {k1} {z}, zmm2, qword ptr [rcx]{1to8}


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