[PATCH] D26799: [X86][AVX512] Instructions fixups
Elena Demikhovsky via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 19 12:28:17 PST 2016
delena added inline comments.
================
Comment at: lib/Target/X86/X86InstrAVX512.td:6431
-defm VCVTDQ2PD : avx512_cvtdq2pd<0xE6, "vcvtdq2pd", sint_to_fp, X86cvtdq2pd>, XS,
- EVEX_CD8<32, CD8VH>;
+defm VCVTDQ2PD : avx512_cvtdq2pd<0xE6, "vcvtdq2pd", sint_to_fp, X86cvtdq2pd, i128mem>,
+ XS, EVEX_CD8<32, CD8VH>;
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coby wrote:
> craig.topper wrote:
> > Shouldn't this be i64mem too? The only difference between VCVTDQ2PD and VCVTUDQ2PD is that one is signed and the other is unsigned. They should have the same load size.
> Note we are altering (in this case - preserving) the AVX512(f,vl) variants alone, which are to load from an xmm-width memory locations (according to formal documentation).
> quad-word instances are restricted to AVX/SSE.
> OTOH, VCVTUDQ2PD, is indeed spec'd to load from a quad-word.
I also think that it should be i64mem for XMM-destination form and i128mem for YMM-destination form.
So, in this case I agree with Craig. The bug is in documentation.
Repository:
rL LLVM
https://reviews.llvm.org/D26799
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