[PATCH] D26799: [X86][AVX512] Instructions fixups

[coby via llvm-commits]

coby added inline comments.


================
Comment at: lib/Target/X86/X86InstrAVX512.td:6431
 
-defm VCVTDQ2PD : avx512_cvtdq2pd<0xE6, "vcvtdq2pd", sint_to_fp, X86cvtdq2pd>, XS,
-                                EVEX_CD8<32, CD8VH>;
+defm VCVTDQ2PD : avx512_cvtdq2pd<0xE6, "vcvtdq2pd", sint_to_fp, X86cvtdq2pd, i128mem>,
+                                XS, EVEX_CD8<32, CD8VH>;
----------------
craig.topper wrote:
> Shouldn't this be i64mem too? The only difference between VCVTDQ2PD and VCVTUDQ2PD is that one is signed and the other is unsigned. They should have the same load size.
Note we are altering (in this case - preserving) the AVX512(f,vl) variants alone, which are to load from an xmm-width memory locations (according to formal documentation).
quad-word instances are restricted to AVX/SSE.
OTOH, VCVTUDQ2PD, is indeed spec'd to load from a quad-word.


Repository:
  rL LLVM

https://reviews.llvm.org/D26799