[PATCH] D26605: [DAGCombiner] Fix infinite loop in vector mul/shl combining

[John Brawn via llvm-commits]

john.brawn added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2163
     SDValue C3 = DAG.getNode(ISD::SHL, SDLoc(N), VT, N1, N0.getOperand(1));
-    AddToWorklist(C3.getNode());
+    assert(isConstantOrConstantVector(C3) && "Failed to constant fold");
     return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), C3);
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RKSimon wrote:
> I'm worried that maybe instead of asserting for a constant value we should just use an if() - there still might end up being odd cases where the constant fold still fails for some reason. Same for the other case below. What do you think?
Sounds reasonable, I'll update the patch (though not until next week as I'll be on holiday).


Repository:
  rL LLVM

https://reviews.llvm.org/D26605