[PATCH] D26413: [XRay] Support AArch64 in compiler-rt

[Renato Golin via llvm-commits]

rengolin added a comment.

In https://reviews.llvm.org/D26413#597248, @rSerge wrote:

> Do you mean that `LDR X2, [X1]` may load part of the data pointed by `X1`, then get interrupted so that another thread changes the other part of the data, then `LDR X2, [X1]` continues reading so that it reads combined/corrupted data?


No. I mean in terms of loads and stores. I was trying to understand what the guarantees X86 provides, to make sure they're the same in AArch64.

>   LDR X1, =_ZN6__xray19XRayPatchedFunctionE
>   LDR X2, [X1]
>   CMP X2, #0
>   BEQ FunctionEntry_restore

I'm not thinking on this sequence, but on the multiple cores executing the same code.

If you guarantee that the symbol `_ZN6__xray19XRayPatchedFunctionE` will always be there (I think you can, as you're not patching that one) and that calling it is *always* safe, even if the tracing is already disabled (in the case where you disable and the remaining threads that already loaded into X1 will jump to), then it should be fine.

If enabling/disabling the trace must be atomic (ie, things will break horribly if `_ZN6__xray19XRayPatchedFunctionE` is called after being disabled), then you need a `DMB`, because the store is in one thread and the load in another.

Makes sense?


https://reviews.llvm.org/D26413