[PATCH] D26413: [XRay] Support AArch64 in compiler-rt

[Serge Rogatch via llvm-commits]

rSerge added a comment.

In https://reviews.llvm.org/D26413#597054, @rengolin wrote:

> Normal loads are not atomic on aarch64, so I still need to understand what the x86 code does and what the guarantee is.


Do you mean that `LDR X2, [X1]` may load part of the data pointed by `X1`, then interrupted so that another thread changes the other part of the data, then the `LDR X2, [X1]` continues reading so that it reads combined/corrupted data?

Or do you mean weak ordering of the instructions being executed on AArch64? The latter should not be a problem because this sequence of instructions carries a dependency one on another:

  LDR X1, =_ZN6__xray19XRayPatchedFunctionE
  LDR X2, [X1]
  CMP X2, #0
  BEQ FunctionEntry_restore


https://reviews.llvm.org/D26413