[PATCH] D26648: Clarify semantic of reserved registers.

[Matthias Braun via llvm-commits]

MatzeB updated this revision to Diff 78039.
MatzeB added a comment.
Herald added a reviewer: vkalintiris.

- Make the rules less strict, marking superregs is only a recommendation now
- Add convenience functions so that it is easy in a target to mark all super regs and to verify whether all super regs are marked
- Fix a bug where AArch64 did not reserve tuples containing the zero register


Repository:
  rL LLVM

https://reviews.llvm.org/D26648

Files:
  include/llvm/Target/TargetRegisterInfo.h
  lib/CodeGen/MachineRegisterInfo.cpp
  lib/CodeGen/MachineVerifier.cpp
  lib/CodeGen/TargetRegisterInfo.cpp
  lib/Target/AArch64/AArch64RegisterInfo.cpp
  lib/Target/ARM/ARMBaseRegisterInfo.cpp

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