[PATCH] D26648: Clarify semantic of reserved registers.

Matthias Braun via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 14 17:40:09 PST 2016


MatzeB added a comment.

In https://reviews.llvm.org/D26648#595284, @qcolombet wrote:

> Hi Matthias,
>
> Thanks for clarifying that. That could lead to subtle bugs :).
>
> I miss one thing in this patch: a helper function that given a set of reserved registers adds the super registers (transitively). Then hint in the comment that TargetRegisterInfo::getReservedRegs could use such  helper.


Indeed, I am currently fixing the existing targets and added such a function for them anyway. BTW: It seems most of the problems are benign, a common pattern is the 64bit registers not getting reserved in 32bit mode. That should be fine as you probably won't see a 64bit operand in 32bit mode anyway. However fixing it properly is worth it so we can add the checking/assert.

> Cheers,
> -Quentin




Repository:
  rL LLVM

https://reviews.llvm.org/D26648





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