[PATCH] D26620: [X86][FastISel] Fix lowering of overflow result on AVX512 targets
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 14 17:02:33 PST 2016
qcolombet accepted this revision.
qcolombet added a reviewer: qcolombet.
qcolombet added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: lib/Target/X86/X86FastISel.cpp:2774
+ Ty->getTypeAtIndex(1)->getScalarSizeInBits() == 1 &&
+ "Overflow value expected to be an i1");
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This could be in a separate NFC patch.
================
Comment at: lib/Target/X86/X86FastISel.cpp:2884
- unsigned ResultReg2 = FuncInfo.CreateRegs(CondTy);
+ unsigned ResultReg2 = createResultReg(&X86::GR8RegClass);
assert((ResultReg+1) == ResultReg2 && "Nonconsecutive result registers.");
----------------
Add a comment on why GR8 is the right class at this point.
Repository:
rL LLVM
https://reviews.llvm.org/D26620
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