[PATCH] D26561: [AArch64] Split 0 vector stores into scalar store pairs.

[Geoff Berry via llvm-commits]

gberry marked an inline comment as done.
gberry added a comment.

Thanks.  I owe you two follow-up changes, which should be coming shortly.



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Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:8817
+///
+static SDValue replaceZeroVectorStore(SelectionDAG &DAG, StoreSDNode *St) {
+  SDValue StVal = St->getValue();
----------------
MatzeB wrote:
> Should use `StoreSDNode &St` as it cannot be nullptr.
I'll fix this in a quick follow-up change since it involves changing a NFC refactor this change depends on.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:8823
+  int NumVecElts = VT.getVectorNumElements();
+  if (NumVecElts != 4 && NumVecElts != 2)
+    return SDValue();
----------------
MatzeB wrote:
> Wouldn't we get this without the if for a 3-element vector:
> ```
> stp xzr, xzr, [x0]
> str xzr, [x0 + 16]
> 
> ```
> should be a sensible thing to do. Or does this need more work for a future commit?
It's a little more complicated because of legalization to catch the v3i32 and v2i32 cases, but I can handle those in a follow-up change.


https://reviews.llvm.org/D26561