[PATCH] D26577: [AVR] Add the pseudo instruction expansion pass
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 14 08:57:21 PST 2016
kparzysz added inline comments.
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:113
+
+ for(Block &MBB : MF) {
+ bool ContinueExpanding = true;
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Space between "for" and "(".
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:126
+ ContinueExpanding = BlockModified;
+ } while(ContinueExpanding);
+ }
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Space after "while".
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:155
+
+ if (ImpIsDead) { MIBHI->getOperand(3).setIsDead(); }
+
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This formatting occurs in several places---please expand it into separate lines.
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:255
+
+ auto MIBLO = buildMI(MBB, MBBI, OpLo)
+ .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead))
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You can just use the actual opcode here (and below, for OpHi), since you are expanding a specific opcode.
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:696
+template<typename Func>
+bool AVRExpandPseudo::expandAtomicBinaryOp(unsigned Opcode, Block &MBB, BlockIt MBBI, Func f) {
+ return expandAtomic(MBB, MBBI, [&](MachineInstr &MI) {
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This line is too long.
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:701
+
+ MachineInstr &NewInst = *buildMI(MBB, MBBI, Opcode).addOperand(Op1).addOperand(Op2).getInstr();
+
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Same here.
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:727
+ // Create the arithmetic op
+ buildMI(MBB, MBBI, ArithOpcode).addOperand(Op1).addOperand(Op1).addOperand(Op2);
+
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Please limit lines to 80 columns.
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Comment at: lib/Target/AVR/AVRExpandPseudoInsts.cpp:1147
+bool AVRExpandPseudo::expand<AVR::RORWRd>(Block &MBB, BlockIt MBBI) {
+ assert(0 && "RORW unimplemented");
+ return false;
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Please use llvm_unreachable instead of assert(0).
https://reviews.llvm.org/D26577
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