[PATCH] D26475: [AMDGPU] Update llvm.amdgcn.frexp.exp intrinsic and lower it to v_frexp_exp_i16_f16 instruction

[Konstantin Zhuravlyov via llvm-commits]

kzhuravl added inline comments.


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Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:181
 def int_amdgcn_frexp_exp : Intrinsic<
-  [llvm_i32_ty], [llvm_anyfloat_ty], [IntrNoMem]
+  [llvm_anyint_ty], [llvm_anyfloat_ty], [IntrNoMem]
 >;
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arsenm wrote:
> Could we add a LLVMMatchType to get an int the same width as the FP type to avoid a second mangled parameter? Also could we just leave it as i32? I think it just zeroes the high 16-bits anyway
Hi Matt, I do not think I understand your suggestion entirely (LLVMMatchType part of it), can you explain it a bit more?

We could leave i32 in the return type of the intrinsic and change `V_FREXP_EXP_I16_F16` to `VOP_I32_F16` and higher 16 bits will be zeroed.


https://reviews.llvm.org/D26475