[PATCH] D26475: [AMDGPU] Update llvm.amdgcn.frexp.exp intrinsic and lower it to v_frexp_exp_i16_f16 instruction

[Matt Arsenault via llvm-commits]

arsenm added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:181
 def int_amdgcn_frexp_exp : Intrinsic<
-  [llvm_i32_ty], [llvm_anyfloat_ty], [IntrNoMem]
+  [llvm_anyint_ty], [llvm_anyfloat_ty], [IntrNoMem]
 >;
----------------
Could we add a LLVMMatchType to get an int the same width as the FP type to avoid a second mangled parameter? Also could we just leave it as i32? I think it just zeroes the high 16-bits anyway


https://reviews.llvm.org/D26475