[PATCH] D26401: [mips][ias] N32/N64 must not sort the relocation table.

[Simon Dardis via llvm-commits]

sdardis created this revision.
sdardis added reviewers: vkalintiris, atanasyan.
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sdardis set the repository for this revision to rL LLVM.

Doing so changes the evaluation order for relocation composition.

Patch By: Daniel Sanders


Repository:
  rL LLVM

https://reviews.llvm.org/D26401

Files:
  lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
  test/MC/Mips/reloc-directive.s


Index: test/MC/Mips/reloc-directive.s
===================================================================
--- test/MC/Mips/reloc-directive.s
+++ test/MC/Mips/reloc-directive.s
@@ -43,16 +43,24 @@
 # OBJ-N32:       0000: 00000000 00000000 00000000
 # OBJ-N32-LABEL: }
 # OBJ-N32-LABEL: Relocations [
-# OBJ-N32:       0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
+
 # OBJ-N32:       0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0
+# OBJ-N32:       0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
 # OBJ-N32:       0x8 R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE .text 0x8
 # OBJ-N32:       0xC R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE -   0x0
 
+# FIXME:This is the correct output for reference.
+
+# OBJ-N32-FIXME:       0x4 R_MIPS_NONE .text 0x0
+# OBJ-N32-FIXME:       0x0 R_MIPS_NONE .text 0x4
+# OBJ-N32-FIXME:       0x8 R_MIPS_32   .text 0x8
+# OBJ-N32-FIXME:       0xC R_MIPS_NONE -     0x0
+
 # OBJ-N64-LABEL: Name: .text
 # OBJ-N64:       0000: 00000000 00000000 00000000
 # OBJ-N64-LABEL: }
 # OBJ-N64-LABEL: Relocations [
-# OBJ-N64:       0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
 # OBJ-N64:       0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0
+# OBJ-N64:       0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
 # OBJ-N64:       0x8 R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE .text 0x8
 # OBJ-N64:       0xC R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE -   0x0
Index: lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
+++ lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
@@ -419,6 +419,9 @@
 /// always match using the expressions from the source.
 void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
                                      std::vector<ELFRelocationEntry> &Relocs) {
+  if (hasRelocationAddend())
+    return;
+
   if (Relocs.size() < 2)
     return;
 


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