[PATCH] D25998: AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 28 07:38:21 PDT 2016
tstellarAMD added inline comments.
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Comment at: test/CodeGen/MIR/AMDGPU/waitcnt.mir:50
+ %vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, 0, implicit %exec, implicit %flat_scr
+ %vgpr3_vgpr4_vgpr5_vgpr6 = FLAT_LOAD_DWORDX4 %vgpr7_vgpr8, 0, 0, 0, implicit %exec, implicit %flat_scr :: (load 16 from %ir.global16)
+ %vgpr0 = V_MOV_B32_e32 %vgpr1, implicit %exec
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arsenm wrote:
> This looks like it has a mem operand although the comment on the check line says it doesn't
The first load is the one without the mem operand, I can clarify this in the comment.
https://reviews.llvm.org/D25998
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