[PATCH] D25507: AMDGPU: Fix counting si_mask_branch as 4 bytes
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 12 02:48:28 PDT 2016
arsenm created this revision.
arsenm added a subscriber: llvm-commits.
Herald added a reviewer: tstellarAMD.
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng, kzhuravl.
https://reviews.llvm.org/D25507
Files:
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstructions.td
Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -143,7 +143,6 @@
let isBranch = 0;
let isTerminator = 1;
let isBarrier = 0;
- let SALU = 1;
let Uses = [EXEC];
let SchedRW = [];
let hasNoSchedulingInfo = 1;
Index: lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.cpp
+++ lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3464,6 +3464,7 @@
return 4;
switch (Opc) {
+ case AMDGPU::SI_MASK_BRANCH:
case TargetOpcode::IMPLICIT_DEF:
case TargetOpcode::KILL:
case TargetOpcode::DBG_VALUE:
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