[llvm] r283829 - [AArch64][MachineLegalizer] Mark v2s32 G_LOAD as legal.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Mon Oct 10 19:21:08 2016
New Revision: 283829

URL: http://llvm.org/viewvc/llvm-project?rev=283829&view=rev
Log:
[AArch64][MachineLegalizer] Mark v2s32 G_LOAD as legal.

Actually every 64-bit loads are legal, but right now the API does not
offer a simple way to express that.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir

Modified: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp?rev=283829&r1=283828&r2=283829&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp Mon Oct 10 19:21:08 2016
@@ -76,7 +76,7 @@ AArch64MachineLegalizer::AArch64MachineL
   setAction({G_FREM, s64}, Libcall);
 
   for (auto MemOp : {G_LOAD, G_STORE}) {
-    for (auto Ty : {s8, s16, s32, s64, p0})
+    for (auto Ty : {s8, s16, s32, s64, p0, v2s32})
       setAction({MemOp, Ty}, Legal);
 
     setAction({MemOp, s1}, WidenScalar);

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir?rev=283829&r1=283828&r2=283829&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir Mon Oct 10 19:21:08 2016
@@ -23,6 +23,7 @@ registers:
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
+  - { id: 7, class: _ }
 body: |
   bb.0.entry:
     liveins: %x0, %x1, %x2, %x3
@@ -47,6 +48,9 @@ body: |
 
     ; CHECK: %6(p0) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
     %6(p0) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
+
+    ; CHECK: %7(<2 x s32>) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
+    %7(<2 x s32>) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
 ...
 
 ---