[PATCH] D21571: [AArch64] Avoid generating indexed vector instructions for Exynos
Renato Golin via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 28 17:25:12 PDT 2016
rengolin added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64TargetMachine.cpp:463
@@ -454,2 +462,3 @@
addPass(createAArch64ExpandPseudoPass());
+
// Use load/store pair instructions when possible.
----------------
Unnecessary white space change
https://reviews.llvm.org/D21571
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