[PATCH] D21571: [AArch64] Avoid generating indexed vector instructions for Exynos

[Sebastian Pop via llvm-commits]

sebpop added a comment.

In https://reviews.llvm.org/D21571#555555, @mcrosier wrote:

> I would prefer we also have a target feature (as was done in the first version of the patch) that early exits runOnMachineFunction for non-Exynos-M1 subtargets.  Otherwise, we're doing a lot of unnecessary work (i.e., switching over every instruction in the function) for non-Exynos-M1 subtargets.


Thanks Chad for catching this.
There seems to be another compile time improvement that we could do: see comment inline.


================
Comment at: llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp:106
@@ +105,3 @@
+  TargetSchedModel SchedModel;
+  SchedModel.init(ST.getSchedModel(), &ST, TII);
+  if (!SchedModel.hasInstrSchedModel())
----------------
Let's move this init() call together with ST and TII outside the for(BB) for(Insn) loops: we can call it in runOnFunction().


https://reviews.llvm.org/D21571