[PATCH] D24125: [AMDGPU] Promote uniform i16 ops to i32 ops
Konstantin Zhuravlyov via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 28 10:23:35 PDT 2016
kzhuravl added inline comments.
================
Comment at: lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:257-263
@@ +256,9 @@
+
+ if (isSigned(I)) {
+ ExtOp1 = Builder.CreateSExt(I.getOperand(1), I32Ty);
+ ExtOp2 = Builder.CreateSExt(I.getOperand(2), I32Ty);
+ } else {
+ ExtOp1 = Builder.CreateZExt(I.getOperand(1), I32Ty);
+ ExtOp2 = Builder.CreateZExt(I.getOperand(2), I32Ty);
+ }
+ ExtRes = Builder.CreateSelect(I.getOperand(0), ExtOp1, ExtOp2);
----------------
tstellarAMD wrote:
> Ok, I just noticed Matt's comment below. What happens if you always sign extend? If you get no regressions from that I think that would be better.
some min patterns do not get matched, which causes min lit test to fail
https://reviews.llvm.org/D24125
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