[PATCH] D24125: [AMDGPU] Promote uniform i16 ops to i32 ops

[Tom Stellard via llvm-commits]

tstellarAMD added a comment.

Just one small comment about the sext/zext for selects.  With that change, this LGTM.


================
Comment at: lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:257-263
@@ +256,9 @@
+
+  if (isSigned(I)) {
+    ExtOp1 = Builder.CreateSExt(I.getOperand(1), I32Ty);
+    ExtOp2 = Builder.CreateSExt(I.getOperand(2), I32Ty);
+  } else {
+    ExtOp1 = Builder.CreateZExt(I.getOperand(1), I32Ty);
+    ExtOp2 = Builder.CreateZExt(I.getOperand(2), I32Ty);
+  }
+  ExtRes = Builder.CreateSelect(I.getOperand(0), ExtOp1, ExtOp2);
----------------
Ok,  I just noticed Matt's comment below.  What happens if you always sign extend?  If you get no regressions from that I think that would be better.


https://reviews.llvm.org/D24125