[PATCH] D24077: [mips] LLVM PR/30197 - Tail call incorrectly clobbers arguments

[Simon Dardis via llvm-commits]

sdardis marked an inline comment as done.

================
Comment at: test/CodeGen/Mips/tailcall/tail-call-arguments-clobber.ll:21-24
@@ +20,6 @@
+
+; MIPS32: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
+; MIPS32: lw ${{[0-9]+}}, {{[0-9]+}}($sp)
+; MIPS32: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
+; MIPS32: sw ${{[0-9]+}}, {{[0-9]+}}($sp)
+  %retval = tail call i32 @func1(i32 %a, i32 %f, i32 %c, i32 %d, i32 %e, i32 %b)
----------------
vkalintiris wrote:
> I don't think that this set of checks will enforce the ordering of loads/stores (similarly for func3).
Are you expecting the loads to come in a specific order? I was testing that the loads comes before the stores, as otherwise the callee/caller argument area gets clobbered. I didn't see the value in checking that 16(sp) comes before 20(sp) for the loads.

The original bug is this:

   lui $2, %hi(_gp_disp)
   addiu $2, $2, %lo(_gp_disp)
   addu  $gp, $2, $25
   lw  $2, 16($sp)
   sw  $5, 20($sp)  <- swapped with the load beneath
   lw  $1, 20($sp)  <- should be before the store
   sw  $2, 16($sp)
   lw  $25, %call16(func1)($gp)
   jr  $25
   move   $5, $1

Whether the load of 16(sp) comes before the load of 20(sp) doesn't seem to matter to me. I'll modify the test to expose the bug better, as it should be using -relocation-model=pic. 


Repository:
  rL LLVM

https://reviews.llvm.org/D24077