[llvm] r280676 - [InstCombine] revert r280637 because it causes test failures on an ARM bot
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 5 15:36:33 PDT 2016
Author: spatel
Date: Mon Sep 5 17:36:32 2016
New Revision: 280676
URL: http://llvm.org/viewvc/llvm-project?rev=280676&view=rev
Log:
[InstCombine] revert r280637 because it causes test failures on an ARM bot
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15/builds/14952/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Aicmp.ll
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/trunk/test/Transforms/InstCombine/icmp.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=280676&r1=280675&r2=280676&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Mon Sep 5 17:36:32 2016
@@ -1532,50 +1532,60 @@ Instruction *InstCombiner::foldICmpAndCo
if (Instruction *I = foldICmpAndShift(Cmp, And, C1))
return I;
+ // FIXME: This check restricts all folds under here to scalar types.
+ ConstantInt *RHS = dyn_cast<ConstantInt>(Cmp.getOperand(1));
+ if (!RHS)
+ return nullptr;
+
// (icmp pred (and (or (lshr A, B), A), 1), 0) -->
// (icmp pred (and A, (or (shl 1, B), 1), 0))
//
// iff pred isn't signed
- if (!Cmp.isSigned() && *C1 == 0 && match(And->getOperand(1), m_One())) {
- Constant *One = cast<Constant>(And->getOperand(1));
- Value *Or = And->getOperand(0);
+ {
Value *A, *B, *LShr;
- if (match(Or, m_Or(m_Value(LShr), m_Value(A))) &&
- match(LShr, m_LShr(m_Specific(A), m_Value(B)))) {
- unsigned UsesRemoved = 0;
- if (And->hasOneUse())
- ++UsesRemoved;
- if (Or->hasOneUse())
- ++UsesRemoved;
- if (LShr->hasOneUse())
- ++UsesRemoved;
-
- // Compute A & ((1 << B) | 1)
- Value *NewOr = nullptr;
- if (auto *C = dyn_cast<Constant>(B)) {
- if (UsesRemoved >= 1)
- NewOr = ConstantExpr::getOr(ConstantExpr::getNUWShl(One, C), One);
- } else {
- if (UsesRemoved >= 3)
- NewOr = Builder->CreateOr(Builder->CreateShl(One, B, LShr->getName(),
+ if (!Cmp.isSigned() && *C1 == 0) {
+ if (match(And->getOperand(1), m_One())) {
+ Constant *One = cast<Constant>(And->getOperand(1));
+ Value *Or = And->getOperand(0);
+ if (match(Or, m_Or(m_Value(LShr), m_Value(A))) &&
+ match(LShr, m_LShr(m_Specific(A), m_Value(B)))) {
+ unsigned UsesRemoved = 0;
+ if (And->hasOneUse())
+ ++UsesRemoved;
+ if (Or->hasOneUse())
+ ++UsesRemoved;
+ if (LShr->hasOneUse())
+ ++UsesRemoved;
+ Value *NewOr = nullptr;
+ // Compute A & ((1 << B) | 1)
+ if (auto *C = dyn_cast<Constant>(B)) {
+ if (UsesRemoved >= 1)
+ NewOr = ConstantExpr::getOr(ConstantExpr::getNUWShl(One, C), One);
+ } else {
+ if (UsesRemoved >= 3)
+ NewOr =
+ Builder->CreateOr(Builder->CreateShl(One, B, LShr->getName(),
/*HasNUW=*/true),
One, Or->getName());
- }
- if (NewOr) {
- Value *NewAnd = Builder->CreateAnd(A, NewOr, And->getName());
- Cmp.setOperand(0, NewAnd);
- return &Cmp;
+ }
+ if (NewOr) {
+ Value *NewAnd = Builder->CreateAnd(A, NewOr, And->getName());
+ Cmp.setOperand(0, NewAnd);
+ return &Cmp;
+ }
+ }
}
}
}
- // (X & C2) > C1 --> (X & C2) != 0, if any bit set in (X & C2) will produce a
- // result greater than C1.
- unsigned NumTZ = C2->countTrailingZeros();
- if (Cmp.getPredicate() == ICmpInst::ICMP_UGT && NumTZ < C2->getBitWidth() &&
- APInt::getOneBitSet(C2->getBitWidth(), NumTZ).ugt(*C1)) {
- Constant *Zero = Constant::getNullValue(And->getType());
- return new ICmpInst(ICmpInst::ICMP_NE, And, Zero);
+ // Replace ((X & C2) > C1) with ((X & C2) != 0), if any bit set in (X & C2)
+ // will produce a result greater than C1.
+ if (Cmp.getPredicate() == ICmpInst::ICMP_UGT) {
+ unsigned NTZ = C2->countTrailingZeros();
+ if ((NTZ < C2->getBitWidth()) &&
+ APInt::getOneBitSet(C2->getBitWidth(), NTZ).ugt(*C1))
+ return new ICmpInst(ICmpInst::ICMP_NE, And,
+ Constant::getNullValue(RHS->getType()));
}
return nullptr;
Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=280676&r1=280675&r2=280676&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Mon Sep 5 17:36:32 2016
@@ -1013,29 +1013,15 @@ define i1 @test67(i32 %x) {
ret i1 %cmp
}
-; The test above relies on 3 different folds.
-; This test only checks the last of those (icmp ugt -> icmp ne).
-
+; FIXME: Vectors should fold the same way.
define <2 x i1> @test67vec(<2 x i32> %x) {
; CHECK-LABEL: @test67vec(
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 96, i32 96>
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
-; CHECK-NEXT: ret <2 x i1> [[CMP]]
-;
- %and = and <2 x i32> %x, <i32 96, i32 96>
- %cmp = icmp ugt <2 x i32> %and, <i32 31, i32 31>
- ret <2 x i1> %cmp
-}
-
-; FIXME: Vector constant for the 'and' should use less bits.
-define <2 x i1> @test67vec2(<2 x i32> %x) {
-; CHECK-LABEL: @test67vec2(
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 127, i32 127>
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[AND]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%and = and <2 x i32> %x, <i32 127, i32 127>
- %cmp = icmp ugt <2 x i32> %and, <i32 31, i32 31>
+ %cmp = icmp sgt <2 x i32> %and, <i32 31, i32 31>
ret <2 x i1> %cmp
}
@@ -2073,12 +2059,13 @@ define i1 @icmp_and_or_lshr(i32 %x, i32
ret i1 %ret
}
+; FIXME: Vectors should fold the same way.
define <2 x i1> @icmp_and_or_lshr_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @icmp_and_or_lshr_vec(
-; CHECK-NEXT: [[SHF1:%.*]] = shl nuw <2 x i32> <i32 1, i32 1>, %y
-; CHECK-NEXT: [[OR2:%.*]] = or <2 x i32> [[SHF1]], <i32 1, i32 1>
-; CHECK-NEXT: [[AND3:%.*]] = and <2 x i32> [[OR2]], %x
-; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND3]], zeroinitializer
+; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> %x, %y
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], %x
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 1, i32 1>
+; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[RET]]
;
%shf = lshr <2 x i32> %x, %y
@@ -2101,10 +2088,13 @@ define i1 @icmp_and_or_lshr_cst(i32 %x)
ret i1 %ret
}
+; FIXME: Vectors should fold the same way.
define <2 x i1> @icmp_and_or_lshr_cst_vec(<2 x i32> %x) {
; CHECK-LABEL: @icmp_and_or_lshr_cst_vec(
-; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> %x, <i32 3, i32 3>
-; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND1]], zeroinitializer
+; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> %x, <i32 1, i32 1>
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], %x
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 1, i32 1>
+; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[RET]]
;
%shf = lshr <2 x i32> %x, <i32 1, i32 1>
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