[llvm] r280376 - [X86][SSE] Dropped (V)CVTPD2PS intrinsic patterns now that its bound to X86vfpround

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 1 10:12:56 PDT 2016


Is hasSideEffects and mayLoad being inferred from the other pattern?

~Craig

On Thu, Sep 1, 2016 at 7:59 AM, Simon Pilgrim via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: rksimon
> Date: Thu Sep  1 09:59:20 2016
> New Revision: 280376
>
> URL: http://llvm.org/viewvc/llvm-project?rev=280376&view=rev
> Log:
> [X86][SSE] Dropped (V)CVTPD2PS intrinsic patterns now that its bound to
> X86vfpround
>
> It now uses X86vfpround patterns directly instead.
>
> Followup to D23797
>
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86InstrSSE.td
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> X86/X86InstrSSE.td?rev=280376&r1=280375&r2=280376&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Sep  1 09:59:20 2016
> @@ -2239,17 +2239,14 @@ let Predicates = [HasSSE2] in {
>  // Provide other assembly rr and rm forms to address this explicitly.
>  def VCVTPD2PSrr : VPDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins
> VR128:$src),
>                         "cvtpd2ps\t{$src, $dst|$dst, $src}",
> -                       [(set VR128:$dst, (int_x86_sse2_cvtpd2ps
> VR128:$src))],
> -                       IIC_SSE_CVT_PD_RR>, VEX, Sched<[WriteCvtF2F]>;
> +                       [], IIC_SSE_CVT_PD_RR>, VEX, Sched<[WriteCvtF2F]>;
>
>  // XMM only
>  def : InstAlias<"vcvtpd2psx\t{$src, $dst|$dst, $src}",
>                  (VCVTPD2PSrr VR128:$dst, VR128:$src), 0>;
>  def VCVTPD2PSXrm : VPDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins
> f128mem:$src),
>                          "cvtpd2psx\t{$src, $dst|$dst, $src}",
> -                        [(set VR128:$dst,
> -                          (int_x86_sse2_cvtpd2ps (loadv2f64 addr:$src)))],
> -                        IIC_SSE_CVT_PD_RM>, VEX, Sched<[WriteCvtF2FLd]>;
> +                        [], IIC_SSE_CVT_PD_RM>, VEX,
> Sched<[WriteCvtF2FLd]>;
>
>  // YMM only
>  def VCVTPD2PSYrr : VPDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins
> VR256:$src),
> @@ -2267,14 +2264,10 @@ def : InstAlias<"vcvtpd2ps\t{$src, $dst|
>
>  def CVTPD2PSrr : PDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
>                       "cvtpd2ps\t{$src, $dst|$dst, $src}",
> -                     [(set VR128:$dst, (int_x86_sse2_cvtpd2ps
> VR128:$src))],
> -                     IIC_SSE_CVT_PD_RR>, Sched<[WriteCvtF2F]>;
> +                     [], IIC_SSE_CVT_PD_RR>, Sched<[WriteCvtF2F]>;
>  def CVTPD2PSrm : PDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins
> f128mem:$src),
>                       "cvtpd2ps\t{$src, $dst|$dst, $src}",
> -                     [(set VR128:$dst,
> -                       (int_x86_sse2_cvtpd2ps (memopv2f64 addr:$src)))],
> -                     IIC_SSE_CVT_PD_RM>, Sched<[WriteCvtF2FLd]>;
> -
> +                     [], IIC_SSE_CVT_PD_RM>, Sched<[WriteCvtF2FLd]>;
>
>  // AVX 256-bit register conversion intrinsics
>  // FIXME: Migrate SSE conversion intrinsics matching to use patterns as
> below
>
>
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