[PATCH] D23561: [RISCV 4/10] Add basic RISCV{InstrFormats, InstrInfo, RegisterInfo, }.td

Alex Bradbury via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 26 05:20:50 PDT 2016


asb added inline comments.

================
Comment at: lib/Target/RISCV/RISCVRegisterInfo.td:18
@@ +17,3 @@
+// Ri - 64-bit integer registers
+  class Ri<bits<5> Enc, string n, list<string> alt = []> : Register<n> {
+    let HWEncoding{4-0} = Enc;
----------------
reames wrote:
> Minor: Ri might be overly terse.  RegID?  Or something which gives some context when seen elsewhere?
It's essentially never referred to again in user-written code - on the one hand this means it only needs to make sense in the context of this file, on the other it means there's little advantage in being terse. Other archs seem to call it ArchReg so I've renamed to RISCVReg.


https://reviews.llvm.org/D23561





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