[PATCH] D23547: [mips] Enforce compact branch restrictions

Daniel Sanders via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 16 06:03:45 PDT 2016


dsanders requested changes to this revision.
This revision now requires changes to proceed.

================
Comment at: lib/Target/Mips/MipsInstrInfo.cpp:437-442
@@ -437,1 +436,8 @@
+      (I->readsRegister(Mips::ZERO) || I->readsRegister(Mips::ZERO_64));
+  if (BranchWithZeroOperand) {
+    ZeroOperandPosition =
+        I->findRegisterUseOperandIdx(Mips::ZERO) == -1
+            ? (unsigned)I->findRegisterUseOperandIdx(Mips::ZERO_64)
+            : (unsigned)I->findRegisterUseOperandIdx(Mips::ZERO);
+  }
 
----------------
There are currently six iterations over the operand list. 5 are findRegisterUseOperandIdx() calls (two of which are inside readsRegister()), then one more to copy the operands. findRegisterUseOperandIdx() checks subregisters so we can cut it down to two with:
  int ZeroOperandPosition = -1;
  if (I->isBranch() && !I->isPseudo()) {
    // Check for reads of any portion of ZERO_64.
    ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO_64);
    BranchWithZeroOperand = ZeroOperandPosition != -1;
  }
then add the necessary signed -> unsigned cast in the loop below.

================
Comment at: lib/Target/Mips/MipsInstrInfo.cpp:485
@@ -478,6 +484,3 @@
 
- } else if (BranchWithZeroOperand) {
-    // For MIPSR6 and microMIPS branches with an explicit zero operand, copy
-    // everything after the zero.
-     MIB.addOperand(I->getOperand(0));
+ } else {
 
----------------
indentation

================
Comment at: test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll:106-107
@@ +105,4 @@
+; CHECK-LABEL: f6:
+; CHECK-NOT: beqc ${{[0-9]+}}, $zero, $BB[0-9]+_[0-9]+
+; CHECK-NOT: bnec ${{[0-9]+}}, $zero, $BB[0-9]+_[0-9]+
+
----------------
Could you check for the correct branch instruction instead? It's easy to get false-passes with just CHECK-NOT.

================
Comment at: test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll:121-122
@@ +120,4 @@
+; CHECK-LABEL: f7:
+; CHECK-NOT: beqc $zero, ${{[0-9]+}}, $BB[0-9]+_[0-9]+
+; CHECK-NOT: bnec $zero, ${{[0-9]+}}, $BB[0-9]+_[0-9]+
+
----------------
Could you check for the correct branch instruction instead?


https://reviews.llvm.org/D23547





More information about the llvm-commits mailing list