[PATCH] D22726: [DAGCombine] Match shift amount by value rather than relying on common sub-expressions.

[Simon Pilgrim via llvm-commits]

RKSimon added inline comments.

================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4857
@@ +4856,3 @@
+    APInt c0 = N1C->getAPIntValue();
+    if (c0.isSingleWord() && c1.isSingleWord() && c1.eq(c0)) {
+      uint64_t OpWidth = N0.getScalarValueSizeInBits();
----------------
c1.eq(c0) will assert if they are not the same bitwidth


Repository:
  rL LLVM

https://reviews.llvm.org/D22726