[PATCH] D21826: AArch64: Change modeling of zero cycle zeroing.

[Tim Northover via llvm-commits]

t.p.northover added inline comments.

================
Comment at: lib/Target/AArch64/AArch64AsmPrinter.cpp:423-424
@@ -418,1 +422,4 @@
 
+void AArch64AsmPrinter::EmitFMovZR(const MachineOperand &Dest, unsigned Opcode,
+                                   unsigned ZR) {
+  unsigned DestReg = Dest.getReg();
----------------
I'm not sure I like the asymmetry here: ZCZ code knows and emits exactly what it wants, NoZCZ code gets passed its opcodes and operands. I'd be happy with either resolution though.


Repository:
  rL LLVM

http://reviews.llvm.org/D21826