[PATCH] D20239: [Power9] Add codegen for VSX word insert/extract instructions

Nemanja Ivanovic via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 21 02:18:16 PDT 2016


nemanjai added inline comments.

================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:2171
@@ +2170,3 @@
+  // Patterns for which instructions from ISA 3.0 are a better match
+  let Predicates = [IsLittleEndian] in {
+  def : Pat<(f32 (PPCfcfidus (PPCmtvsrz (i32 (extractelt v4i32:$A, 0))))),
----------------
This needs HasP9Vector as well since the Predicates don't nest (i.e. this statement overrides what is set for the block).

================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:2198
@@ +2197,3 @@
+
+  let Predicates = [IsBigEndian] in {
+  def : Pat<(f32 (PPCfcfidus (PPCmtvsrz (i32 (extractelt v4i32:$A, 0))))),
----------------
Same as above.


Repository:
  rL LLVM

http://reviews.llvm.org/D20239





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