[PATCH] D16829: An implementation of Swing Modulo Scheduling

[Mark Schimmel via llvm-commits]

marksl added a comment.

After ISEL our compare instructions, multiply, and MAC instructions have real physical register side effects. I'm getting errors from SWP for loops containing these physical register dependencies. Are you aware of this? Is there a way to model physical register dependencies with loop carried dependencies such that we would generate correct code for them?


http://reviews.llvm.org/D16829