[llvm] r272516 - Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.
Sean Silva via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 14 19:51:15 PDT 2016
Awesome dogfooding this!
On Sun, Jun 12, 2016 at 10:30 AM, Benjamin Kramer via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
> Author: d0k
> Date: Sun Jun 12 12:30:47 2016
> New Revision: 272516
>
> URL: http://llvm.org/viewvc/llvm-project?rev=272516&view=rev
> Log:
> Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.
>
> No functionality change intended.
>
> Modified:
> llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp
> llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
> llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
> llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
> llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
> llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
> llvm/trunk/tools/llvm-mc/llvm-mc.cpp
> llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Sun Jun 12 12:30:47
> 2016
> @@ -998,7 +998,7 @@ void DwarfDebug::beginInstruction(const
>
> // Check if source location changes, but ignore DBG_VALUE locations.
> if (!MI->isDebugValue()) {
> - DebugLoc DL = MI->getDebugLoc();
> + const DebugLoc &DL = MI->getDebugLoc();
> if (DL != PrevInstLoc) {
> if (DL) {
> unsigned Flags = 0;
>
> Modified: llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp Sun Jun
> 12 12:30:47 2016
> @@ -1139,7 +1139,7 @@ bool HexagonAsmParser::parseOperand(Oper
> static char const *RParen = ")";
> Operands.push_back(HexagonOperand::CreateToken(LParen, Begin));
> Operands.push_back(HexagonOperand::CreateReg(Register, Begin,
> End));
> - AsmToken MaybeDotNew = Lexer.getTok();
> + const AsmToken &MaybeDotNew = Lexer.getTok();
> if (MaybeDotNew.is(AsmToken::TokenKind::Identifier) &&
> MaybeDotNew.getString().equals_lower(".new"))
> splitIdentifier(Operands);
> @@ -1155,7 +1155,7 @@ bool HexagonAsmParser::parseOperand(Oper
> Operands.insert(Operands.end () - 1,
> HexagonOperand::CreateToken(LParen, Begin));
> Operands.push_back(HexagonOperand::CreateReg(Register, Begin,
> End));
> - AsmToken MaybeDotNew = Lexer.getTok();
> + const AsmToken &MaybeDotNew = Lexer.getTok();
> if (MaybeDotNew.is(AsmToken::TokenKind::Identifier) &&
> MaybeDotNew.getString().equals_lower(".new"))
> splitIdentifier(Operands);
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp Sun Jun 12
> 12:30:47 2016
> @@ -1302,7 +1302,7 @@ bool RedundantInstrElimination::processB
> continue;
>
> // If found, replace the instruction with a COPY.
> - DebugLoc DL = MI->getDebugLoc();
> + const DebugLoc &DL = MI->getDebugLoc();
> const TargetRegisterClass *FRC = HBS::getFinalVRegClass(RD, MRI);
> unsigned NewR = MRI.createVirtualRegister(FRC);
> BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR)
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp Sun Jun 12
> 12:30:47 2016
> @@ -960,7 +960,7 @@ void HexagonEarlyIfConversion::eliminate
> // MRI.replaceVregUsesWith does not allow to update the subregister,
> // so instead of doing the use-iteration here, create a copy into a
> // "non-subregistered" register.
> - DebugLoc DL = PN->getDebugLoc();
> + const DebugLoc &DL = PN->getDebugLoc();
> const TargetRegisterClass *RC = MRI->getRegClass(DefR);
> NewR = MRI->createVirtualRegister(RC);
> NonPHI = BuildMI(*B, NonPHI, DL, TII->get(TargetOpcode::COPY), NewR)
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp Sun Jun 12
> 12:30:47 2016
> @@ -616,7 +616,7 @@ MachineInstr *HexagonExpandCondsets::gen
> bool PredSense, bool ReadUndef, bool ImpUse) {
> MachineInstr *MI = SrcOp.getParent();
> MachineBasicBlock &B = *At->getParent();
> - DebugLoc DL = MI->getDebugLoc();
> + const DebugLoc &DL = MI->getDebugLoc();
>
> // Don't avoid identity copies here (i.e. if the source and the
> destination
> // are the same registers). It is actually better to generate them here,
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp Sun Jun 12
> 12:30:47 2016
> @@ -2120,7 +2120,7 @@ void HexagonFrameLowering::optimizeSpill
> MachineBasicBlock::iterator StartIt = SI, NextIt;
> MachineInstr *CopyIn = nullptr;
> if (SrcRR.Reg != FoundR || SrcRR.Sub != 0) {
> - DebugLoc DL = SI->getDebugLoc();
> + const DebugLoc &DL = SI->getDebugLoc();
> CopyIn = BuildMI(B, StartIt, DL, HII.get(TargetOpcode::COPY),
> FoundR)
> .addOperand(SrcOp);
> }
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp Sun Jun 12
> 12:30:47 2016
> @@ -196,7 +196,7 @@ void HexagonRegisterInfo::eliminateFrame
> // register and use it with offset 0.
> auto &MRI = MF.getRegInfo();
> unsigned TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
> - DebugLoc DL = MI.getDebugLoc();
> + const DebugLoc &DL = MI.getDebugLoc();
> BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR)
> .addReg(BP)
> .addImm(RealOffset);
>
> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Sun Jun 12 12:30:47
> 2016
> @@ -1191,7 +1191,7 @@ MachineBasicBlock *MipsTargetLowering::e
> MachineInstr *MI, MachineBasicBlock *BB, unsigned Size, unsigned
> DstReg,
> unsigned SrcReg) const {
> const TargetInstrInfo *TII = Subtarget.getInstrInfo();
> - DebugLoc DL = MI->getDebugLoc();
> + const DebugLoc &DL = MI->getDebugLoc();
>
> if (Subtarget.hasMips32r2() && Size == 1) {
> BuildMI(BB, DL, TII->get(Mips::SEB), DstReg).addReg(SrcReg);
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Sun Jun 12 12:30:47
> 2016
> @@ -1830,7 +1830,7 @@ eliminateCallFramePseudoInstr(MachineFun
> unsigned LISInstr = is64Bit ? PPC::LIS8 : PPC::LIS;
> unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI;
> MachineInstr *MI = I;
> - DebugLoc dl = MI->getDebugLoc();
> + const DebugLoc &dl = MI->getDebugLoc();
>
> if (isInt<16>(CalleeAmt)) {
> BuildMI(MBB, I, dl, TII.get(ADDIInstr), StackReg)
>
> Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Sun Jun 12 12:30:47 2016
> @@ -786,7 +786,7 @@ static const TableEntry PopTable[] = {
> ///
> void FPS::popStackAfter(MachineBasicBlock::iterator &I) {
> MachineInstr* MI = I;
> - DebugLoc dl = MI->getDebugLoc();
> + const DebugLoc &dl = MI->getDebugLoc();
> ASSERT_SORTED(PopTable);
> if (StackTop == 0)
> report_fatal_error("Cannot pop empty stack!");
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sun Jun 12 12:30:47 2016
> @@ -2504,7 +2504,7 @@ void X86InstrInfo::reMaterialize(Machine
> llvm_unreachable("Unexpected instruction!");
> }
>
> - DebugLoc DL = Orig->getDebugLoc();
> + const DebugLoc &DL = Orig->getDebugLoc();
> BuildMI(MBB, I, DL, get(X86::MOV32ri)).addOperand(Orig->getOperand(0))
> .addImm(Value);
> } else {
>
> Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original)
> +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Sun Jun 12 12:30:47
> 2016
> @@ -1302,7 +1302,7 @@ updateInlinedAtInfo(const DebugLoc &DL,
> /// to encode location where these instructions are inlined.
> static void fixupLineNumbers(Function *Fn, Function::iterator FI,
> Instruction *TheCall) {
> - DebugLoc TheCallDL = TheCall->getDebugLoc();
> + const DebugLoc &TheCallDL = TheCall->getDebugLoc();
> if (!TheCallDL)
> return;
>
>
> Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)
> +++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Sun Jun 12 12:30:47 2016
> @@ -250,7 +250,7 @@ static int AsLexInput(SourceMgr &SrcMgr,
>
> bool Error = false;
> while (Lexer.Lex().isNot(AsmToken::Eof)) {
> - AsmToken Tok = Lexer.getTok();
> + const AsmToken &Tok = Lexer.getTok();
>
> switch (Tok.getKind()) {
> default:
>
> Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Sun Jun 12 12:30:47 2016
> @@ -576,7 +576,7 @@ void AsmWriterEmitter::EmitGetRegisterNa
> O << " switch(AltIdx) {\n"
> << " default: llvm_unreachable(\"Invalid register alt name
> index!\");\n";
> for (const Record *R : AltNameIndices) {
> - std::string AltName(R->getName());
> + const std::string &AltName = R->getName();
> std::string Prefix = !Namespace.empty() ? Namespace + "::" : "";
> O << " case " << Prefix << AltName << ":\n"
> << " assert(*(AsmStrs" << AltName << "+RegAsmOffset"
>
> Modified: llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp?rev=272516&r1=272515&r2=272516&view=diff
>
> ==============================================================================
> --- llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp Sun Jun 12 12:30:47
> 2016
> @@ -709,7 +709,7 @@ int DFAPacketizerEmitter::collectAllComb
> Record *ComboFunc = FuncData->getValueAsDef("TheComboFunc");
> const std::vector<Record*> &FuncList =
>
> FuncData->getValueAsListOfDefs("FuncList");
> - std::string ComboFuncName = ComboFunc->getName();
> + const std::string &ComboFuncName = ComboFunc->getName();
> unsigned ComboBit = FUNameToBitsMap[ComboFuncName];
> unsigned ComboResources = ComboBit;
> DEBUG(dbgs() << " combo: " << ComboFuncName
>
>
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