[PATCH] D20310: Teach LLVM about Power 9 D-Form VSX Instructions

[Chuang-Yu Cheng via llvm-commits]

cycheng added a comment.

> Yes, except that I'm not sure that we want to remove the register classes, just the register definitions themselves. This makes the change smaller, and also does not force us to add VSX-only data types to the Altivec register classes. In short, add VR0-31 directly to VSHRC. Does that make sense? Then you'll need some, but not all, of the changes you outline below.

> 

> Thanks again,

> Hal


Hi Hal,

I’ve seen some benefits because of this elimination, when I was fixing test case failures, I found we could generate shorter code than before. So I thought it is a right direction to simplify register hierarchy.

I had update 7 codegen test cases, but I still had one test case failure, that was encoding checking, I will fix it soon.

The new VSRC is composed of (VSLRC, VRRC), so I have removed all VSH related def and use.

CY


http://reviews.llvm.org/D20310