[PATCH] D20032: AMDGPU/R600: Use correct number of vector elements when lowering private loads

[Jan Vesely via llvm-commits]

jvesely added inline comments.

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Comment at: lib/Target/AMDGPU/R600ISelLowering.cpp:1664
@@ -1663,3 +1663,3 @@
     EVT ElemVT = VT.getVectorElementType();
-    SDValue Loads[4];
+    SmallVector<SDValue, 4> Loads(NumElemVT);
 
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jvesely wrote:
> arsenm wrote:
> > Why is this being hit for > 4 elements? Those should have been split up during type legalization already by the time it reaches here
> You're right, it's not. I realized it during testing. Keeping SDValue [4] and using makeArrayRef(Loads, NumElementVT) works too. SmallVector seemed a bit more robust.
would you prefer if I changed the approach to makeArrayRef, or removed the v16 tests from this patch?


Repository:
  rL LLVM

http://reviews.llvm.org/D20032