[PATCH] D19410: [scan-build] fix logic error warnings emitted on llvm code base

[Apelete Seketeli via llvm-commits]

apelete updated this revision to Diff 56264.
apelete added a comment.

[scan-build] fix warnings emitted on LLVM ARM code base

Changes since last revision:

- split patch into ARM changes unit to ease review process,
- cherry-pick ARM changes from http://reviews.llvm.org/D19498.


http://reviews.llvm.org/D19410

Files:
  lib/Target/ARM/ARMFrameLowering.cpp
  lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
  lib/Target/ARM/Thumb2SizeReduction.cpp

Index: lib/Target/ARM/Thumb2SizeReduction.cpp
===================================================================
--- lib/Target/ARM/Thumb2SizeReduction.cpp
+++ lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -989,6 +989,7 @@
     }
 
     if (!NextInSameBundle && MI->isInsideBundle()) {
+      assert(BundleMI && "MachineInstr is null, abort reducing width of instructions");
       // FIXME: Since post-ra scheduler operates on bundles, the CPSR kill
       // marker is only on the BUNDLE instruction. Process the BUNDLE
       // instruction as we finish with the bundled instruction to work around
Index: lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
===================================================================
--- lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
+++ lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
@@ -406,6 +406,7 @@
     report_fatal_error("FIXME: relocations to absolute targets "
                        "not yet implemented");
   } else {
+    assert(A && "symbol is needed to resolve constant variables");
     // Resolve constant variables.
     if (A->isVariable()) {
       int64_t Res;
Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9961,7 +9961,9 @@
     return true;
 
   // '.align' is target specifically handled to mean 2**2 byte alignment.
-  if (getStreamer().getCurrentSection().first->UseCodeAlign())
+  const MCSection *Section = getStreamer().getCurrentSection().first;
+  assert(Section && "must have section to emit alignment");
+  if (Section->UseCodeAlign())
     getStreamer().EmitCodeAlignment(4, 0);
   else
     getStreamer().EmitValueToAlignment(4, 0, 1, 0);
Index: lib/Target/ARM/ARMFrameLowering.cpp
===================================================================
--- lib/Target/ARM/ARMFrameLowering.cpp
+++ lib/Target/ARM/ARMFrameLowering.cpp
@@ -1607,9 +1607,9 @@
   // FIXME: We could add logic to be more precise about negative offsets
   //        and which instructions will need a scratch register for them. Is it
   //        worth the effort and added fragility?
-  bool BigStack = (RS && (MFI->estimateStackSize(MF) +
-                              ((hasFP(MF) && AFI->hasStackFrame()) ? 4 : 0) >=
-                          estimateRSStackSizeLimit(MF, this))) ||
+  bool BigStack = ((MFI->estimateStackSize(MF) +
+                    ((hasFP(MF) && AFI->hasStackFrame()) ? 4 : 0) >=
+                    estimateRSStackSizeLimit(MF, this))) ||
                   MFI->hasVarSizedObjects() ||
                   (MFI->adjustsStack() && !canSimplifyCallFramePseudos(MF));
 


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