[PATCH] D19825: Power9 - Add exploitation of vector load and store that do not require swaps
Bill Schmidt via llvm-commits
llvm-commits at lists.llvm.org
Mon May 2 13:18:10 PDT 2016
wschmidt added a comment.
This looks fine to me. A couple of inline comments. I'll let someone else give final approval.
================
Comment at: lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp:36
@@ -35,1 +35,3 @@
+// Useful for testing purposes. Prints vs{31-63} as v{0-31} respectivelly.
+static cl::opt<bool>
----------------
nemanjai wrote:
> If there are objections to adding this, I'm happy to remove it. The reason I added it is that I find it frustrating that I can't specify FileCheck patterns that ensure that a VSX instruction's result is the correct operand of a VMX instruction and vice-versa.
>
> I could also wrap this in an
> #ifndef _NDEBUG
> block, but then we would have to ensure that test cases that use it somehow require LLVM Asserts.
I'm agnostic about that; however, you should remove the extra "l" from "respectively." :)
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Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:1012
@@ -1008,1 +1011,3 @@
+ Op = PPC::STXVX;
+ NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(Op))
.addReg(SrcReg,
----------------
Could use ternary operator here.
================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:1137
@@ -1130,1 +1136,3 @@
+ Op = PPC::LXVX;
+ NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(Op), DestReg),
FrameIdx));
----------------
Same comment.
Repository:
rL LLVM
http://reviews.llvm.org/D19825
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