[llvm] r265573 - [RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 6 12:12:17 PDT 2016
I’ve reverted it in r265587.
I need to use a few std::move here and there to fix the issue I believe.
Anyhow investigating, but the bot should be back to green.
Q.
> On Apr 6, 2016, at 11:43 AM, Quentin Colombet <qcolombet at apple.com> wrote:
>
> Second attempt at r265584...
>> On Apr 6, 2016, at 11:31 AM, Quentin Colombet via llvm-commits <llvm-commits at lists.llvm.org <mailto:llvm-commits at lists.llvm.org>> wrote:
>>
>> Hi Mike,
>>
>> Thanks for pointing that out.
>>
>> I saw it and I hope r265581 will fix it.
>>
>> Cheers,
>> -Quentin
>>> On Apr 6, 2016, at 11:24 AM, Mike Aizatsky <aizatsky at google.com <mailto:aizatsky at google.com>> wrote:
>>>
>>> This commit breaks the sanitizer-windows bot:
>>>
>>> http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882 <http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882>
>>>
>>> FAILED: C:\PROGRA~2\MICROS~1.0\VC\bin\cl.exe /nologo /TP /DWIN32 /D_WINDOWS /W3 -wd4141 -wd4146 -wd4180 -wd4244 -wd4258 -wd4267 -wd4291 -wd4345 -wd4351 -wd4355 -wd4456 -wd4457 -wd4458 -wd4459 -wd4503 -wd4624 -wd4722 -wd4800 -wd4100 -wd4127 -wd4512 -wd4505 -wd4610 -wd4510 -wd4702 -wd4245 -wd4706 -wd4310 -wd4701 -wd4703 -wd4389 -wd4611 -wd4805 -wd4204 -wd4577 -wd4091 -wd4592 -wd4319 -wd4324 -w14062 -we4238 /Zc:inline /Oi /Zc:rvalueCast /MD /O2 /Ob2 -Ilib\Target\AArch64 -IC:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64 -Iinclude -IC:\b\slave\sanitizer-windows\llvm\include -UNDEBUG /EHs-c- /GR- /showIncludes -DGTEST_HAS_RTTI=0 -D_CRT_NONSTDC_NO_DEPRECATE -D_CRT_NONSTDC_NO_WARNINGS -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS -D_DEBUG_POINTER_IMPL="" -D_HAS_EXCEPTIONS=0 -D_SCL_SECURE_NO_DEPRECATE -D_SCL_SECURE_NO_WARNINGS -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS /Folib\Target\AArch64\CMakeFiles\LLVMAArch64CodeGen.dir\AArch64TargetMachine.cpp.obj /Fdlib\Target\AArch64\CMakeFiles\LLVMAArch64CodeGen.dir\ /FS -c C:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64\AArch64TargetMachine.cpp
>>> C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\INCLUDE\xstddef(316) : error C2280: 'std::unique_ptr<llvm::RegisterBankInfo::ValueMapping [],std::default_delete<_Ty>>::unique_ptr(const std::unique_ptr<_Ty,std::default_delete<_Ty>> &)' : attempting to reference a deleted function
>>> with
>>> [
>>> _Ty=llvm::RegisterBankInfo::ValueMapping []
>>> ]
>>> C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\INCLUDE\memory(1618) : see declaration of 'std::unique_ptr<llvm::RegisterBankInfo::ValueMapping [],std::default_delete<_Ty>>::unique_ptr'
>>> with
>>> [
>>> _Ty=llvm::RegisterBankInfo::ValueMapping []
>>> ]
>>> This diagnostic occurred in the compiler generated function 'llvm::RegisterBankInfo::InstructionMapping::InstructionMapping(const llvm::RegisterBankInfo::InstructionMapping &)'
>>>
>>>
>>> On Wed, Apr 6, 2016 at 10:51 AM Quentin Colombet via llvm-commits <llvm-commits at lists.llvm.org <mailto:llvm-commits at lists.llvm.org>> wrote:
>>> Author: qcolombet
>>> Date: Wed Apr 6 12:45:40 2016
>>> New Revision: 265573
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=265573&view=rev <http://llvm.org/viewvc/llvm-project?rev=265573&view=rev>
>>> Log:
>>> [RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.
>>> This will be used by the register bank select pass to assign register banks
>>> for generic virtual registers.
>>>
>>> Modified:
>>> llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
>>> llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
>>>
>>> Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h?rev=265573&r1=265572&r2=265573&view=diff <http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h?rev=265573&r1=265572&r2=265573&view=diff>
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h (original)
>>> +++ llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h Wed Apr 6 12:45:40 2016
>>> @@ -16,6 +16,7 @@
>>> #define LLVM_CODEGEN_GLOBALISEL_REGBANKINFO_H
>>>
>>> #include "llvm/ADT/APInt.h"
>>> +#include "llvm/ADT/SmallVector.h"
>>> #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
>>> #include "llvm/CodeGen/GlobalISel/Types.h"
>>> #include "llvm/Support/ErrorHandling.h"
>>> @@ -123,6 +124,11 @@ public:
>>> void verify(const MachineInstr &MI) const;
>>> };
>>>
>>> + /// Convenient type to represent the alternatives for mapping an
>>> + /// instruction.
>>> + /// \todo When we move to TableGen this should be an array ref.
>>> + typedef SmallVector<InstructionMapping, 4> InstructionMappings;
>>> +
>>> protected:
>>> /// Hold the set of supported register banks.
>>> std::unique_ptr<RegisterBank[]> RegBanks;
>>> @@ -196,6 +202,69 @@ public:
>>> return 0;
>>> }
>>>
>>> + /// Identifier used when the related instruction mapping instance
>>> + /// is generated by target independent code.
>>> + /// Make sure not to use that identifier to avoid possible collision.
>>> + static const unsigned DefaultMappingID;
>>> +
>>> + /// Get the mapping of the different operands of \p MI
>>> + /// on the register bank.
>>> + /// This mapping should be the direct translation of \p MI.
>>> + /// The target independent implementation gives a mapping based on
>>> + /// the register classes for the target specific opcode.
>>> + /// It uses the ID RegisterBankInfo::DefaultMappingID for that mapping.
>>> + /// Make sure you do not use that ID for the alternative mapping
>>> + /// for MI. See getInstrAlternativeMappings for the alternative
>>> + /// mappings.
>>> + ///
>>> + /// For instance, if \p MI is a vector add, the mapping should
>>> + /// not be a scalarization of the add.
>>> + ///
>>> + /// \post returnedVal.verify(MI).
>>> + ///
>>> + /// \note If returnedVal does not verify MI, this would probably mean
>>> + /// that the target does not support that instruction.
>>> + virtual InstructionMapping getInstrMapping(const MachineInstr &MI) const;
>>> +
>>> + /// Get the alternative mappings for \p MI.
>>> + /// Alternative in the sense different from getInstrMapping.
>>> + virtual InstructionMappings
>>> + getInstrAlternativeMappings(const MachineInstr &MI) const {
>>> + // No alternative for MI.
>>> + return InstructionMappings();
>>> + }
>>> +
>>> + /// Get the possible mapping for \p MI.
>>> + /// A mapping defines where the different operands may live and at what cost.
>>> + /// For instance, let us consider:
>>> + /// v0(16) = G_ADD <2 x i8> v1, v2
>>> + /// The possible mapping could be:
>>> + ///
>>> + /// {/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)},
>>> + /// /*v2*/{(0xFFFF, VPR)}}
>>> + /// {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)},
>>> + /// /*v1*/{(0x00FF, GPR),(0xFF00, GPR)},
>>> + /// /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}
>>> + ///
>>> + /// \note The first alternative of the returned mapping should be the
>>> + /// direct translation of \p MI current form.
>>> + ///
>>> + /// \post !returnedVal.empty().
>>> + InstructionMappings getInstrPossibleMappings(const MachineInstr &MI) const {
>>> + InstructionMappings PossibleMappings;
>>> + // Put the default mapping first.
>>> + PossibleMappings.push_back(getInstrMapping(MI));
>>> + // Then the alternative mapping, if any.
>>> + InstructionMappings AltMappings = getInstrAlternativeMappings(MI);
>>> + for (InstructionMapping &AltMapping : AltMappings)
>>> + PossibleMappings.emplace_back(std::move(AltMapping));
>>> +#ifndef NDEBUG
>>> + for (const InstructionMapping &Mapping : PossibleMappings)
>>> + Mapping.verify(MI);
>>> +#endif
>>> + return PossibleMappings;
>>> + }
>>> +
>>> void verify(const TargetRegisterInfo &TRI) const;
>>> };
>>>
>>>
>>> Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=265573&r1=265572&r2=265573&view=diff <http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=265573&r1=265572&r2=265573&view=diff>
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp Wed Apr 6 12:45:40 2016
>>> @@ -19,6 +19,7 @@
>>> #include "llvm/CodeGen/MachineRegisterInfo.h"
>>> #include "llvm/Support/Debug.h"
>>> #include "llvm/Support/raw_ostream.h"
>>> +#include "llvm/Target/TargetOpcodes.h"
>>> #include "llvm/Target/TargetRegisterInfo.h"
>>>
>>> #include <algorithm> // For std::max.
>>> @@ -27,6 +28,8 @@
>>>
>>> using namespace llvm;
>>>
>>> +const unsigned RegisterBankInfo::DefaultMappingID = UINT_MAX;
>>> +
>>> RegisterBankInfo::RegisterBankInfo(unsigned NumRegBanks)
>>> : NumRegBanks(NumRegBanks) {
>>> RegBanks.reset(new RegisterBank[NumRegBanks]);
>>> @@ -176,6 +179,14 @@ void RegisterBankInfo::addRegBankCoverag
>>> } while (!WorkList.empty());
>>> }
>>>
>>> +RegisterBankInfo::InstructionMapping
>>> +RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
>>> + if (MI.getOpcode() > TargetOpcode::GENERIC_OP_END) {
>>> + // TODO.
>>> + }
>>> + llvm_unreachable("The target must implement this");
>>> +}
>>> +
>>> //------------------------------------------------------------------------------
>>> // Helper classes implementation.
>>> //------------------------------------------------------------------------------
>>>
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at lists.llvm.org <mailto:llvm-commits at lists.llvm.org>
>>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits <http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits>
>>> --
>>> Mike
>>> Sent from phone
>>
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