<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">I’ve reverted it in <span style="font-family: Menlo; font-size: 11px;" class="">r265587.</span><div><br class=""></div><div>I need to use a few std::move here and there to fix the issue I believe.</div><div>Anyhow investigating, but the bot should be back to green.</div><div><br class=""></div><div>Q.<br class=""><blockquote type="cite" class=""><div class="">On Apr 6, 2016, at 11:43 AM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><meta http-equiv="Content-Type" content="text/html charset=us-ascii" class=""><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Second attempt at <span style="font-family: Menlo; font-size: 11px;" class="">r265584...</span><div style="" class=""><blockquote type="cite" class=""><div class="">On Apr 6, 2016, at 11:31 AM, Quentin Colombet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><meta http-equiv="Content-Type" content="text/html charset=us-ascii" class=""><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi Mike,<div class=""><br class=""></div><div class="">Thanks for pointing that out.</div><div class=""><br class=""></div><div class="">I saw it and I hope r265581 will fix it.</div><div class=""><br class=""></div><div class="">Cheers,</div><div class="">-Quentin<br class=""><div class=""><blockquote type="cite" class=""><div class="">On Apr 6, 2016, at 11:24 AM, Mike Aizatsky <<a href="mailto:aizatsky@google.com" class="">aizatsky@google.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">This commit breaks the sanitizer-windows bot:<div class=""><br class=""></div><div class=""><a href="http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882" class="">http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882</a><br class=""></div><div class=""><br class=""></div><div class=""><div class="">FAILED: C:\PROGRA~2\MICROS~1.0\VC\bin\cl.exe /nologo /TP /DWIN32 /D_WINDOWS /W3 -wd4141 -wd4146 -wd4180 -wd4244 -wd4258 -wd4267 -wd4291 -wd4345 -wd4351 -wd4355 -wd4456 -wd4457 -wd4458 -wd4459 -wd4503 -wd4624 -wd4722 -wd4800 -wd4100 -wd4127 -wd4512 -wd4505 -wd4610 -wd4510 -wd4702 -wd4245 -wd4706 -wd4310 -wd4701 -wd4703 -wd4389 -wd4611 -wd4805 -wd4204 -wd4577 -wd4091 -wd4592 -wd4319 -wd4324 -w14062 -we4238 /Zc:inline /Oi /Zc:rvalueCast /MD /O2 /Ob2 -Ilib\Target\AArch64 -IC:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64 -Iinclude -IC:\b\slave\sanitizer-windows\llvm\include -UNDEBUG /EHs-c- /GR- /showIncludes -DGTEST_HAS_RTTI=0 -D_CRT_NONSTDC_NO_DEPRECATE -D_CRT_NONSTDC_NO_WARNINGS -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS -D_DEBUG_POINTER_IMPL="" -D_HAS_EXCEPTIONS=0 -D_SCL_SECURE_NO_DEPRECATE -D_SCL_SECURE_NO_WARNINGS -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS /Folib\Target\AArch64\CMakeFiles\LLVMAArch64CodeGen.dir\AArch64TargetMachine.cpp.obj /Fdlib\Target\AArch64\CMakeFiles\LLVMAArch64CodeGen.dir\ /FS -c C:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64\AArch64TargetMachine.cpp</div><div class="">C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\INCLUDE\xstddef(316) : error C2280: 'std::unique_ptr<llvm::RegisterBankInfo::ValueMapping [],std::default_delete<_Ty>>::unique_ptr(const std::unique_ptr<_Ty,std::default_delete<_Ty>> &)' : attempting to reference a deleted function</div><div class=""> with</div><div class=""> [</div><div class=""> _Ty=llvm::RegisterBankInfo::ValueMapping []</div><div class=""> ]</div><div class=""> C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\INCLUDE\memory(1618) : see declaration of 'std::unique_ptr<llvm::RegisterBankInfo::ValueMapping [],std::default_delete<_Ty>>::unique_ptr'</div><div class=""> with</div><div class=""> [</div><div class=""> _Ty=llvm::RegisterBankInfo::ValueMapping []</div><div class=""> ]</div><div class=""> This diagnostic occurred in the compiler generated function 'llvm::RegisterBankInfo::InstructionMapping::InstructionMapping(const llvm::RegisterBankInfo::InstructionMapping &)'</div></div><div class=""><br class=""></div></div><br class=""><div class="gmail_quote"><div dir="ltr" class="">On Wed, Apr 6, 2016 at 10:51 AM Quentin Colombet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:<br class=""></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: qcolombet<br class="">
Date: Wed Apr 6 12:45:40 2016<br class="">
New Revision: 265573<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=265573&view=rev" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=265573&view=rev</a><br class="">
Log:<br class="">
[RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.<br class="">
This will be used by the register bank select pass to assign register banks<br class="">
for generic virtual registers.<br class="">
<br class="">
Modified:<br class="">
llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h<br class="">
llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h?rev=265573&r1=265572&r2=265573&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h?rev=265573&r1=265572&r2=265573&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h (original)<br class="">
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h Wed Apr 6 12:45:40 2016<br class="">
@@ -16,6 +16,7 @@<br class="">
#define LLVM_CODEGEN_GLOBALISEL_REGBANKINFO_H<br class="">
<br class="">
#include "llvm/ADT/APInt.h"<br class="">
+#include "llvm/ADT/SmallVector.h"<br class="">
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"<br class="">
#include "llvm/CodeGen/GlobalISel/Types.h"<br class="">
#include "llvm/Support/ErrorHandling.h"<br class="">
@@ -123,6 +124,11 @@ public:<br class="">
void verify(const MachineInstr &MI) const;<br class="">
};<br class="">
<br class="">
+ /// Convenient type to represent the alternatives for mapping an<br class="">
+ /// instruction.<br class="">
+ /// \todo When we move to TableGen this should be an array ref.<br class="">
+ typedef SmallVector<InstructionMapping, 4> InstructionMappings;<br class="">
+<br class="">
protected:<br class="">
/// Hold the set of supported register banks.<br class="">
std::unique_ptr<RegisterBank[]> RegBanks;<br class="">
@@ -196,6 +202,69 @@ public:<br class="">
return 0;<br class="">
}<br class="">
<br class="">
+ /// Identifier used when the related instruction mapping instance<br class="">
+ /// is generated by target independent code.<br class="">
+ /// Make sure not to use that identifier to avoid possible collision.<br class="">
+ static const unsigned DefaultMappingID;<br class="">
+<br class="">
+ /// Get the mapping of the different operands of \p MI<br class="">
+ /// on the register bank.<br class="">
+ /// This mapping should be the direct translation of \p MI.<br class="">
+ /// The target independent implementation gives a mapping based on<br class="">
+ /// the register classes for the target specific opcode.<br class="">
+ /// It uses the ID RegisterBankInfo::DefaultMappingID for that mapping.<br class="">
+ /// Make sure you do not use that ID for the alternative mapping<br class="">
+ /// for MI. See getInstrAlternativeMappings for the alternative<br class="">
+ /// mappings.<br class="">
+ ///<br class="">
+ /// For instance, if \p MI is a vector add, the mapping should<br class="">
+ /// not be a scalarization of the add.<br class="">
+ ///<br class="">
+ /// \post returnedVal.verify(MI).<br class="">
+ ///<br class="">
+ /// \note If returnedVal does not verify MI, this would probably mean<br class="">
+ /// that the target does not support that instruction.<br class="">
+ virtual InstructionMapping getInstrMapping(const MachineInstr &MI) const;<br class="">
+<br class="">
+ /// Get the alternative mappings for \p MI.<br class="">
+ /// Alternative in the sense different from getInstrMapping.<br class="">
+ virtual InstructionMappings<br class="">
+ getInstrAlternativeMappings(const MachineInstr &MI) const {<br class="">
+ // No alternative for MI.<br class="">
+ return InstructionMappings();<br class="">
+ }<br class="">
+<br class="">
+ /// Get the possible mapping for \p MI.<br class="">
+ /// A mapping defines where the different operands may live and at what cost.<br class="">
+ /// For instance, let us consider:<br class="">
+ /// v0(16) = G_ADD <2 x i8> v1, v2<br class="">
+ /// The possible mapping could be:<br class="">
+ ///<br class="">
+ /// {/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)},<br class="">
+ /// /*v2*/{(0xFFFF, VPR)}}<br class="">
+ /// {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)},<br class="">
+ /// /*v1*/{(0x00FF, GPR),(0xFF00, GPR)},<br class="">
+ /// /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}<br class="">
+ ///<br class="">
+ /// \note The first alternative of the returned mapping should be the<br class="">
+ /// direct translation of \p MI current form.<br class="">
+ ///<br class="">
+ /// \post !returnedVal.empty().<br class="">
+ InstructionMappings getInstrPossibleMappings(const MachineInstr &MI) const {<br class="">
+ InstructionMappings PossibleMappings;<br class="">
+ // Put the default mapping first.<br class="">
+ PossibleMappings.push_back(getInstrMapping(MI));<br class="">
+ // Then the alternative mapping, if any.<br class="">
+ InstructionMappings AltMappings = getInstrAlternativeMappings(MI);<br class="">
+ for (InstructionMapping &AltMapping : AltMappings)<br class="">
+ PossibleMappings.emplace_back(std::move(AltMapping));<br class="">
+#ifndef NDEBUG<br class="">
+ for (const InstructionMapping &Mapping : PossibleMappings)<br class="">
+ Mapping.verify(MI);<br class="">
+#endif<br class="">
+ return PossibleMappings;<br class="">
+ }<br class="">
+<br class="">
void verify(const TargetRegisterInfo &TRI) const;<br class="">
};<br class="">
<br class="">
<br class="">
Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=265573&r1=265572&r2=265573&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=265573&r1=265572&r2=265573&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp (original)<br class="">
+++ llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp Wed Apr 6 12:45:40 2016<br class="">
@@ -19,6 +19,7 @@<br class="">
#include "llvm/CodeGen/MachineRegisterInfo.h"<br class="">
#include "llvm/Support/Debug.h"<br class="">
#include "llvm/Support/raw_ostream.h"<br class="">
+#include "llvm/Target/TargetOpcodes.h"<br class="">
#include "llvm/Target/TargetRegisterInfo.h"<br class="">
<br class="">
#include <algorithm> // For std::max.<br class="">
@@ -27,6 +28,8 @@<br class="">
<br class="">
using namespace llvm;<br class="">
<br class="">
+const unsigned RegisterBankInfo::DefaultMappingID = UINT_MAX;<br class="">
+<br class="">
RegisterBankInfo::RegisterBankInfo(unsigned NumRegBanks)<br class="">
: NumRegBanks(NumRegBanks) {<br class="">
RegBanks.reset(new RegisterBank[NumRegBanks]);<br class="">
@@ -176,6 +179,14 @@ void RegisterBankInfo::addRegBankCoverag<br class="">
} while (!WorkList.empty());<br class="">
}<br class="">
<br class="">
+RegisterBankInfo::InstructionMapping<br class="">
+RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {<br class="">
+ if (MI.getOpcode() > TargetOpcode::GENERIC_OP_END) {<br class="">
+ // TODO.<br class="">
+ }<br class="">
+ llvm_unreachable("The target must implement this");<br class="">
+}<br class="">
+<br class="">
//------------------------------------------------------------------------------<br class="">
// Helper classes implementation.<br class="">
//------------------------------------------------------------------------------<br class="">
<br class="">
<br class="">
_______________________________________________<br class="">
llvm-commits mailing list<br class="">
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<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank" class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br class="">
</blockquote></div><div dir="ltr" class="">-- <br class=""></div>Mike<br class="">Sent from phone
</div></blockquote></div><br class=""></div></div>_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class=""><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br class=""></div></blockquote></div><br class=""></div></div></blockquote></div><br class=""></body></html>