[PATCH] D18802: Improve support for i386 and i486 CPUs.

[Ahmed Bougacha via llvm-commits]

ab added a subscriber: ab.
ab added a comment.

For BSWAP: would it work to do the custom lowering at ISel time instead of using a pseudo? I think it's possible to even write a pattern.


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Comment at: lib/Target/X86/X86.td:279
@@ -272,1 +278,3 @@
+def : Proc<"pentium-mmx",     [FeatureX87, FeatureSlowUAMem16, FeatureMMX, Feature586Insns]>;
+def : Proc<"i686",            [FeatureX87, FeatureSlowUAMem16, Feature586Insns]>;
 def : Proc<"pentiumpro",      [FeatureX87, FeatureSlowUAMem16, FeatureCMOV]>;
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Should these features be on the remaining models?  It'd probably be time to do ProcessorFeatures lists like SNB.

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Comment at: lib/Target/X86/X86InstrCompiler.td:1964
@@ +1963,3 @@
+                       (outs GR32:$dst), (ins GR32:$src),
+                       "bswap\t$dst",
+                      [(set GR32:$dst, (bswap GR32:$src))]>;
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Make it obvious that it's a pseudo in the asmstring?

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Comment at: lib/Target/X86/X86InstrInfo.td:771
@@ +770,3 @@
+def Has486Insns  : Predicate<"Subtarget->has486Insns()">;
+def No486Insns  : Predicate<"!Subtarget->has486Insns()">;
+def Has586Insns  : Predicate<"Subtarget->has586Insns()">;
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: alignment

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Comment at: test/CodeGen/X86/bswap.ll:25
@@ -28,1 +24,3 @@
+; CHECK386: rorw $8, %ax
+; CHECKBSW: bswapl %
         %Z = call i32 @llvm.bswap.i32( i32 %A )         ; <i32> [#uses=1]
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Newline between the checks? And/or shorten CHECK386 -> I386?


http://reviews.llvm.org/D18802