[PATCH] D17533: CXX_FAST_TLS calling convention: performance improvement for PPC64
Kit Barton via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 30 13:24:13 PDT 2016
kbarton added inline comments.
================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:5821
@@ +5820,3 @@
+ if (I) {
+ for (; *I; ++I) {
+
----------------
Is this guaranteed to be a null-terminated list?
I looked quickly but could not find the answer.
================
Comment at: lib/Target/PowerPC/PPCISelLowering.h:446
@@ +445,3 @@
+ bool supportSplitCSR(MachineFunction *MF) const override {
+ return
+ MF->getFunction()->getCallingConv() == CallingConv::CXX_FAST_TLS &&
----------------
It could be my browser, but the indentation of the return looks way off.
================
Comment at: lib/Target/PowerPC/PPCRegisterInfo.cpp:145
@@ +144,3 @@
+ bool SaveR2 = !getReservedRegs(*MF).test(PPC::X2);
+ return TM.isPPC64()
+ ? (Subtarget.hasAltivec()
----------------
I thought this was disabled for 32-bit on line 11613 of PPCISelLowering.cpp.
Can you combine the check for 32-bit with the check for DarwinABI on line 138? That should simplify this logic a bit.
================
Comment at: lib/Target/PowerPC/PPCRegisterInfo.cpp:153
@@ +152,3 @@
+ : CSR_SVR464_ViaCopy_SaveList))
+ : nullptr;
+ }
----------------
I find this nesting of conditional operators very difficult to read.
http://reviews.llvm.org/D17533
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