[PATCH] D18072: Skeleton for the IR level pass to perform 64bit Integer Division

[Uthkarsh Satish via llvm-commits]

Uthkarsh updated this revision to Diff 50497.
Uthkarsh added a comment.

Unnecessary comments deleted.


http://reviews.llvm.org/D18072

Files:
  lib/Target/AMDGPU/AMDGPUIntegerDivisionPass.cpp

Index: lib/Target/AMDGPU/AMDGPUIntegerDivisionPass.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUIntegerDivisionPass.cpp
+++ lib/Target/AMDGPU/AMDGPUIntegerDivisionPass.cpp
@@ -71,7 +71,6 @@
 }
 
 bool AMDGPUIntegerDivision::runOnFunction(Function &F) {
-//  llvm_unreachable("does this happen");
   if (TM)
     TLI = TM->getSubtargetImpl(F)->getTargetLowering();
 
@@ -98,7 +97,7 @@
   bool isUdiv64 = I.getOpcode() == Instruction::UDiv &&  I.getType()->isIntegerTy(64);
   return shouldExpandInIr && isUdiv64;
 }
-/*TODO:Uthkarsh 
+/* 
   Change the function calls to your own menthods instead of the in-built integer division which
   introduces more control flow. 
 */


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