[PATCH] D18087: [mips] Eliminate instances of "potentially uninitialised local variable" warnings, NFC

[David Blaikie via llvm-commits]

I'm still not sure cleaning up these warnings is worthwhile. If we aren't
going to get warning clean & keep the warning on/maintained (in which case
I'd really advocate for us to use Clang's version and/or implement the
necessary variant in Clang) what's the merit in rephrasing the cases that
aren't buggy (this appears to be such a case - correct me if I'm wrong?

On Fri, Mar 11, 2016 at 7:37 AM, Scott Egerton via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> s.egerton created this revision.
> s.egerton added reviewers: ariccio, dsanders, vkalintiris.
> s.egerton added a subscriber: llvm-commits.
> Herald added a subscriber: dsanders.
>
> This should eliminate all occurrences of this within LLVMMipsAsmParser.
> This patch is in response to http://reviews.llvm.org/D17983. I was unable
> to reproduce the warnings on my machine so please advise if this fixes the
> warnings.
>
> http://reviews.llvm.org/D18087
>
> Files:
>   lib/Target/Mips/AsmParser/MipsAsmParser.cpp
>
> Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> ===================================================================
> --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> @@ -2600,8 +2600,7 @@
>  void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
>                                    SmallVectorImpl<MCInst> &Instructions,
>                                    bool isLoad, bool isImmOpnd) {
> -  unsigned ImmOffset, HiOffset, LoOffset;
> -  const MCExpr *ExprOffset;
> +  MCOperand HiOperand, LoOperand;
>    unsigned TmpRegNum;
>    // 1st operand is either the source or destination register.
>    assert(Inst.getOperand(0).isReg() && "expected register operand kind");
> @@ -2612,14 +2611,19 @@
>    // 3rd operand is either an immediate or expression.
>    if (isImmOpnd) {
>      assert(Inst.getOperand(2).isImm() && "expected immediate operand
> kind");
> -    ImmOffset = Inst.getOperand(2).getImm();
> -    LoOffset = ImmOffset & 0x0000ffff;
> -    HiOffset = (ImmOffset & 0xffff0000) >> 16;
> +    unsigned ImmOffset = Inst.getOperand(2).getImm();
> +    unsigned LoOffset = ImmOffset & 0x0000ffff;
> +    unsigned HiOffset = (ImmOffset & 0xffff0000) >> 16;
>      // If msb of LoOffset is 1(negative number) we must increment
> HiOffset.
>      if (LoOffset & 0x8000)
>        HiOffset++;
> -  } else
> -    ExprOffset = Inst.getOperand(2).getExpr();
> +    LoOperand = MCOperand::createImm(LoOffset);
> +    HiOperand = MCOperand::createImm(HiOffset);
> +  } else {
> +    const MCExpr *ExprOffset = Inst.getOperand(2).getExpr();
> +    LoOperand = MCOperand::createExpr(evaluateRelocExpr(ExprOffset,
> "lo"));
> +    HiOperand = MCOperand::createExpr(evaluateRelocExpr(ExprOffset,
> "hi"));
> +  }
>    // These are some of the types of expansions we perform here:
>    // 1) lw $8, sym        => lui $8, %hi(sym)
>    //                         lw $8, %lo(sym)($8)
> @@ -2658,20 +2662,13 @@
>        return;
>    }
>
> -  emitRX(Mips::LUi, TmpRegNum,
> -         isImmOpnd ? MCOperand::createImm(HiOffset)
> -                   : MCOperand::createExpr(evaluateRelocExpr(ExprOffset,
> "hi")),
> -         IDLoc, Instructions);
> +  emitRX(Mips::LUi, TmpRegNum, HiOperand, IDLoc, Instructions);
>    // Add temp register to base.
>    if (BaseRegNum != Mips::ZERO)
>      emitRRR(Mips::ADDu, TmpRegNum, TmpRegNum, BaseRegNum, IDLoc,
> Instructions);
>    // And finally, create original instruction with low part
>    // of offset and new base.
> -  emitRRX(Inst.getOpcode(), RegOpNum, TmpRegNum,
> -          isImmOpnd
> -              ? MCOperand::createImm(LoOffset)
> -              : MCOperand::createExpr(evaluateRelocExpr(ExprOffset,
> "lo")),
> -          IDLoc, Instructions);
> +  emitRRX(Inst.getOpcode(), RegOpNum, TmpRegNum, LoOperand, IDLoc,
> Instructions);
>  }
>
>  bool
>
>
>
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