[PATCH] D17830: [MBP] Avoid placing random blocks between loop preheader and header

[Philip Reames via llvm-commits]

reames created this revision.
reames added reviewers: davidxl, congh, djasper, chandlerc.
reames added a subscriber: llvm-commits.
Herald added a subscriber: mcrosier.

If we have a loop with a rarely taken path, we will prune that from the blocks which get added as part of the loop chain.  The problem is that we weren't then recognizing the loop chain as schedulable when considering the preheader when forming the function chain.  We'd then fall to various non-predecessors before finally scheduling the loop chain (as if the CFG was unnatural.)  The net result was that there could be lots of garbage between a loop preheader and the loop, even though we could have directly fallen into the loop.  It also meant we separated hot code with regions of colder code.  

The particular reason for the rejection of the loop chain was that we were scanning predecessor of the header, seeing the backedge, believing that was a globally more important predecessor (true), but forgetting to account for the fact the backedge precessor was already part of the existing loop chain (oops!.

http://reviews.llvm.org/D17830

Files:
  lib/CodeGen/MachineBlockPlacement.cpp
  test/CodeGen/X86/mbp-false-cfg-break.ll

Index: test/CodeGen/X86/mbp-false-cfg-break.ll
===================================================================
--- test/CodeGen/X86/mbp-false-cfg-break.ll
+++ test/CodeGen/X86/mbp-false-cfg-break.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+define void @test(i1 %cnd) !prof !{!"function_entry_count", i64 1024} {
+; CHECK-LABEL: @test
+; Using the assembly comments to indicate block order..
+; CHECK: # %loop
+; CHECK: # %backedge
+; CHECK: # %exit
+; CHECK: # %rare
+; CHECK: # %rare.1
+
+  br i1 undef, label %rare.1, label %preheader, !prof !{!"branch_weights", i32 0, i32 1000}
+rare.1:
+  call void @foo()
+  br label %preheader
+
+preheader:
+  br label %loop
+
+loop:
+  %iv = phi i32 [0, %preheader], [%iv.next, %backedge]
+  call void @foo()
+  br i1 %cnd, label %backedge, label %rare, !prof !{!"branch_weights", i32 1000000, i32 1}
+rare:
+  call void @foo()
+  br label %backedge
+backedge:
+  call void @foo()
+  %iv.next = add i32 %iv, 1
+  %cmp = icmp eq i32 %iv.next, 200
+  br i1 %cmp, label %loop, label %exit, !prof !{!"branch_weights", i32 1000, i32 1}
+
+exit:
+  ret void
+
+}
+
+
+declare void @foo()
Index: lib/CodeGen/MachineBlockPlacement.cpp
===================================================================
--- lib/CodeGen/MachineBlockPlacement.cpp
+++ lib/CodeGen/MachineBlockPlacement.cpp
@@ -466,7 +466,8 @@
           MBFI->getBlockFreq(BB) * RealSuccProb * HotProb.getCompl();
       bool BadCFGConflict = false;
       for (MachineBasicBlock *Pred : Succ->predecessors()) {
-        if (Pred == Succ || (BlockFilter && !BlockFilter->count(Pred)) ||
+        if (Pred == Succ || BlockToChain[Pred] == &SuccChain ||
+            (BlockFilter && !BlockFilter->count(Pred)) ||
             BlockToChain[Pred] == &Chain)
           continue;
         BlockFrequency PredEdgeFreq =


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