[llvm] r261504 - CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Duncan P. N. Exon Smith via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 21 14:58:36 PST 2016
Author: dexonsmith
Date: Sun Feb 21 16:58:35 2016
New Revision: 261504
URL: http://llvm.org/viewvc/llvm-project?rev=261504&view=rev
Log:
CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Delete MachineInstr::getIterator(), since the term "iterator" is
overloaded when talking about MachineInstr.
- Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so
that ilist_node::getIterator() is still available.
- Add it back as MachineInstr::getInstrIterator(). This matches the
naming in MachineBasicBlock.
- Add MachineInstr::getBundleIterator(). This is explicitly called
"bundle" (not matching MachineBasicBlock) to disintinguish it clearly
from ilist_node::getIterator().
- Update all calls. Some of these I switched to `auto` to remove
boiler-plate, since the new name is clear about the type.
There was one call I updated that looked fishy, but it wasn't clear what
the right answer was. This was in X86FrameLowering::inlineStackProbe(),
added in r252578 in lib/Target/X86/X86FrameLowering.cpp. I opted to
leave the behaviour unchanged, but I'll reply to the original commit on
the list in a moment.
Modified:
llvm/trunk/include/llvm/ADT/ilist.h
llvm/trunk/include/llvm/CodeGen/MachineInstr.h
llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h
llvm/trunk/lib/CodeGen/DFAPacketizer.cpp
llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
llvm/trunk/lib/CodeGen/MachineInstr.cpp
llvm/trunk/lib/CodeGen/ProcessImplicitDefs.cpp
llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
llvm/trunk/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
llvm/trunk/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp
llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp
llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp
llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
Modified: llvm/trunk/include/llvm/ADT/ilist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist.h?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/ilist.h (original)
+++ llvm/trunk/include/llvm/ADT/ilist.h Sun Feb 21 16:58:35 2016
@@ -638,7 +638,7 @@ public:
/// \brief Get the previous node, or \c nullptr for the list head.
NodeTy *getPrevNode(NodeTy &N) const {
- auto I = N.getIterator();
+ auto I = static_cast<ilist_node<NodeTy> &>(N).getIterator();
if (I == begin())
return nullptr;
return &*std::prev(I);
@@ -650,7 +650,7 @@ public:
/// \brief Get the next node, or \c nullptr for the list tail.
NodeTy *getNextNode(NodeTy &N) const {
- auto Next = std::next(N.getIterator());
+ auto Next = std::next(static_cast<ilist_node<NodeTy> &>(N).getIterator());
if (Next == end())
return nullptr;
return &*Next;
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Sun Feb 21 16:58:35 2016
@@ -25,6 +25,7 @@
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachineInstrBundleIterator.h"
#include "llvm/IR/DebugInfo.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/InlineAsm.h"
@@ -139,6 +140,21 @@ public:
const MachineBasicBlock* getParent() const { return Parent; }
MachineBasicBlock* getParent() { return Parent; }
+ // Disallow getIterator(), since it's ambiguous.
+ void getIterator() = delete;
+ typedef ilist_iterator<MachineInstr> instr_iterator;
+ typedef ilist_iterator<const MachineInstr> const_instr_iterator;
+ instr_iterator getInstrIterator() { return instr_iterator(this); }
+ const_instr_iterator getInstrIterator() const {
+ return const_instr_iterator(this);
+ }
+ typedef MachineInstrBundleIterator<MachineInstr> bundle_iterator;
+ typedef MachineInstrBundleIterator<const MachineInstr> const_bundle_iterator;
+ bundle_iterator getBundleIterator() { return bundle_iterator(this); }
+ const_bundle_iterator getBundleIterator() const {
+ return const_bundle_iterator(this);
+ }
+
/// Return the asm printer flags bitvector.
uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; }
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h Sun Feb 21 16:58:35 2016
@@ -472,7 +472,7 @@ public:
if (I == Begin) {
if (!empty())
MI->bundleWithSucc();
- Begin = MI->getIterator();
+ Begin = MI->getInstrIterator();
return *this;
}
if (I == End) {
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstrBundle.h Sun Feb 21 16:58:35 2016
@@ -116,10 +116,10 @@ protected:
///
explicit MachineOperandIteratorBase(MachineInstr *MI, bool WholeBundle) {
if (WholeBundle) {
- InstrI = getBundleStart(MI)->getIterator();
+ InstrI = getBundleStart(MI)->getInstrIterator();
InstrE = MI->getParent()->instr_end();
} else {
- InstrI = InstrE = MI->getIterator();
+ InstrI = InstrE = MI->getInstrIterator();
++InstrE;
}
OpI = InstrI->operands_begin();
Modified: llvm/trunk/lib/CodeGen/DFAPacketizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DFAPacketizer.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DFAPacketizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/DFAPacketizer.cpp Sun Feb 21 16:58:35 2016
@@ -198,7 +198,7 @@ VLIWPacketizerList::~VLIWPacketizerList(
void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, MachineInstr *MI) {
if (CurrentPacketMIs.size() > 1) {
MachineInstr *MIFirst = CurrentPacketMIs.front();
- finalizeBundle(*MBB, MIFirst->getIterator(), MI->getIterator());
+ finalizeBundle(*MBB, MIFirst->getInstrIterator(), MI->getInstrIterator());
}
CurrentPacketMIs.clear();
ResourceTracker->clearResources();
Modified: llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp Sun Feb 21 16:58:35 2016
@@ -90,8 +90,10 @@ static bool NoInterveningSideEffect(cons
if (MI->getParent() != MBB)
return false;
- for (MachineBasicBlock::const_iterator I = std::next(CopyMI->getIterator()),
- E = MBB->end(), E2 = MI->getIterator(); I != E && I != E2; ++I) {
+ for (MachineBasicBlock::const_instr_iterator
+ I = std::next(CopyMI->getInstrIterator()),
+ E = MBB->instr_end(), E2 = MI->getInstrIterator();
+ I != E && I != E2; ++I) {
if (I->hasUnmodeledSideEffects() || I->isCall() ||
I->isTerminator())
return false;
@@ -163,8 +165,8 @@ void MachineCopyPropagation::CopyPropaga
// Clear any kills of Def between CopyMI and MI. This extends the
// live range.
- for (MachineInstr &MMI
- : make_range(CopyMI->getIterator(), MI->getIterator()))
+ for (MachineInstr &MMI :
+ make_range(CopyMI->getInstrIterator(), MI->getInstrIterator()))
MMI.clearRegisterKills(Def, TRI);
MI->eraseFromParent();
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Sun Feb 21 16:58:35 2016
@@ -934,7 +934,7 @@ MachineInstr::mergeMemRefsWith(const Mac
bool MachineInstr::hasPropertyInBundle(unsigned Mask, QueryType Type) const {
assert(!isBundledWithPred() && "Must be called on bundle header");
- for (MachineBasicBlock::const_instr_iterator MII = getIterator();; ++MII) {
+ for (auto MII = getInstrIterator();; ++MII) {
if (MII->getDesc().getFlags() & Mask) {
if (Type == AnyInBundle)
return true;
@@ -958,10 +958,10 @@ bool MachineInstr::isIdenticalTo(const M
if (isBundle()) {
// Both instructions are bundles, compare MIs inside the bundle.
- MachineBasicBlock::const_instr_iterator I1 = getIterator();
- MachineBasicBlock::const_instr_iterator E1 = getParent()->instr_end();
- MachineBasicBlock::const_instr_iterator I2 = Other->getIterator();
- MachineBasicBlock::const_instr_iterator E2= Other->getParent()->instr_end();
+ auto I1 = getInstrIterator();
+ auto E1 = getParent()->instr_end();
+ auto I2 = Other->getInstrIterator();
+ auto E2 = Other->getParent()->instr_end();
while (++I1 != E1 && I1->isInsideBundle()) {
++I2;
if (I2 == E2 || !I2->isInsideBundle() || !I1->isIdenticalTo(&*I2, Check))
@@ -1069,8 +1069,7 @@ unsigned MachineInstr::getNumExplicitOpe
void MachineInstr::bundleWithPred() {
assert(!isBundledWithPred() && "MI is already bundled with its predecessor");
setFlag(BundledPred);
- MachineBasicBlock::instr_iterator Pred = getIterator();
- --Pred;
+ auto Pred = --getInstrIterator();
assert(!Pred->isBundledWithSucc() && "Inconsistent bundle flags");
Pred->setFlag(BundledSucc);
}
@@ -1078,8 +1077,7 @@ void MachineInstr::bundleWithPred() {
void MachineInstr::bundleWithSucc() {
assert(!isBundledWithSucc() && "MI is already bundled with its successor");
setFlag(BundledSucc);
- MachineBasicBlock::instr_iterator Succ = getIterator();
- ++Succ;
+ auto Succ = ++getInstrIterator();
assert(!Succ->isBundledWithPred() && "Inconsistent bundle flags");
Succ->setFlag(BundledPred);
}
@@ -1087,8 +1085,7 @@ void MachineInstr::bundleWithSucc() {
void MachineInstr::unbundleFromPred() {
assert(isBundledWithPred() && "MI isn't bundled with its predecessor");
clearFlag(BundledPred);
- MachineBasicBlock::instr_iterator Pred = getIterator();
- --Pred;
+ auto Pred = --getInstrIterator();
assert(Pred->isBundledWithSucc() && "Inconsistent bundle flags");
Pred->clearFlag(BundledSucc);
}
@@ -1096,8 +1093,7 @@ void MachineInstr::unbundleFromPred() {
void MachineInstr::unbundleFromSucc() {
assert(isBundledWithSucc() && "MI isn't bundled with its successor");
clearFlag(BundledSucc);
- MachineBasicBlock::instr_iterator Succ = getIterator();
- ++Succ;
+ auto Succ = ++getInstrIterator();
assert(Succ->isBundledWithPred() && "Inconsistent bundle flags");
Succ->clearFlag(BundledPred);
}
@@ -1232,7 +1228,7 @@ const TargetRegisterClass *MachineInstr:
/// Return the number of instructions inside the MI bundle, not counting the
/// header instruction.
unsigned MachineInstr::getBundleSize() const {
- MachineBasicBlock::const_instr_iterator I = getIterator();
+ auto I = getInstrIterator();
unsigned Size = 0;
while (I->isBundledWithSucc()) {
++Size;
Modified: llvm/trunk/lib/CodeGen/ProcessImplicitDefs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ProcessImplicitDefs.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ProcessImplicitDefs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ProcessImplicitDefs.cpp Sun Feb 21 16:58:35 2016
@@ -96,8 +96,8 @@ void ProcessImplicitDefs::processImplici
// This is a physreg implicit-def.
// Look for the first instruction to use or define an alias.
- MachineBasicBlock::instr_iterator UserMI = MI->getIterator();
- MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end();
+ auto UserMI = MI->getInstrIterator();
+ auto UserE = MI->getParent()->instr_end();
bool Found = false;
for (++UserMI; UserMI != UserE; ++UserMI) {
for (MachineOperand &MO : UserMI->operands()) {
Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Sun Feb 21 16:58:35 2016
@@ -1200,8 +1200,8 @@ static void toggleBundleKillFlag(Machine
// Once we set a kill flag on an instruction, we bail out, as otherwise we
// might set it on too many operands. We will clear as many flags as we
// can though.
- MachineBasicBlock::instr_iterator Begin = MI->getIterator();
- MachineBasicBlock::instr_iterator End = getBundleEnd(MI);
+ auto Begin = MI->getInstrIterator();
+ auto End = getBundleEnd(MI);
while (Begin != End) {
for (MachineOperand &MO : (--End)->operands()) {
if (!MO.isReg() || MO.isDef() || Reg != MO.getReg())
@@ -1334,8 +1334,8 @@ void ScheduleDAGInstrs::fixupKills(Machi
toggleKillFlag(MI, MO);
DEBUG(MI->dump());
DEBUG(if (MI->getOpcode() == TargetOpcode::BUNDLE) {
- MachineBasicBlock::instr_iterator Begin = MI->getIterator();
- MachineBasicBlock::instr_iterator End = getBundleEnd(MI);
+ auto Begin = MI->getInstrIterator();
+ auto End = getBundleEnd(MI);
while (++Begin != End)
DEBUG(Begin->dump());
});
Modified: llvm/trunk/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp Sun Feb 21 16:58:35 2016
@@ -118,7 +118,7 @@ struct LDTLSCleanup : public MachineFunc
// Insert a copy from X0 to TLSBaseAddrReg for later.
MachineInstr *Copy =
- BuildMI(*I->getParent(), ++I->getIterator(), I->getDebugLoc(),
+ BuildMI(*I->getParent(), ++I->getInstrIterator(), I->getDebugLoc(),
TII->get(TargetOpcode::COPY), *TLSBaseAddrReg)
.addReg(AArch64::X0);
Modified: llvm/trunk/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp Sun Feb 21 16:58:35 2016
@@ -154,8 +154,8 @@ bool AArch64RedundantCopyElimination::op
MBB->addLiveIn(TargetReg);
// Clear any kills of TargetReg between CompBr and the last removed COPY.
- for (MachineInstr &MMI :
- make_range(MBB->begin()->getIterator(), LastChange->getIterator()))
+ for (MachineInstr &MMI : make_range(MBB->begin()->getInstrIterator(),
+ LastChange->getInstrIterator()))
MMI.clearRegisterKills(SmallestDef, TRI);
return true;
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp Sun Feb 21 16:58:35 2016
@@ -97,7 +97,7 @@ void AMDGPUAsmPrinter::EmitInstruction(c
#endif
if (MI->isBundle()) {
const MachineBasicBlock *MBB = MI->getParent();
- MachineBasicBlock::const_instr_iterator I = ++MI->getIterator();
+ auto I = ++MI->getInstrIterator();
while (I != MBB->instr_end() && I->isInsideBundle()) {
EmitInstruction(&*I);
++I;
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Sun Feb 21 16:58:35 2016
@@ -440,8 +440,8 @@ ReverseBranchCondition(SmallVectorImpl<M
bool ARMBaseInstrInfo::isPredicated(const MachineInstr *MI) const {
if (MI->isBundle()) {
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
while (++I != E && I->isInsideBundle()) {
int PIdx = I->findFirstPredOperandIdx();
if (PIdx != -1 && I->getOperand(PIdx).getImm() != ARMCC::AL)
@@ -647,8 +647,8 @@ unsigned ARMBaseInstrInfo::GetInstSizeIn
unsigned ARMBaseInstrInfo::getInstBundleLength(const MachineInstr *MI) const {
unsigned Size = 0;
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
while (++I != E && I->isInsideBundle()) {
assert(!I->isBundle() && "No nested bundle!");
Size += GetInstSizeInBytes(&*I);
@@ -3432,7 +3432,7 @@ static const MachineInstr *getBundledUse
unsigned &UseIdx, unsigned &Dist) {
Dist = 0;
- MachineBasicBlock::const_instr_iterator II = ++MI->getIterator();
+ auto II = ++MI->getInstrIterator();
assert(II->isInsideBundle() && "Empty bundle?");
MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
@@ -3975,8 +3975,8 @@ unsigned ARMBaseInstrInfo::getInstrLaten
// other passes may query the latency of a bundled instruction.
if (MI->isBundle()) {
unsigned Latency = 0;
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
while (++I != E && I->isInsideBundle()) {
if (I->getOpcode() != ARM::t2IT)
Latency += getInstrLatency(ItinData, &*I, PredCost);
Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Sun Feb 21 16:58:35 2016
@@ -731,7 +731,7 @@ void ARMExpandPseudo::ExpandMOV32BitImm(
HI16.addImm(Pred).addReg(PredReg);
if (RequiresBundling)
- finalizeBundle(MBB, LO16->getIterator(), MBBI->getIterator());
+ finalizeBundle(MBB, LO16->getInstrIterator(), MBBI->getInstrIterator());
TransferImpOps(MI, LO16, HI16);
MI.eraseFromParent();
Modified: llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp Sun Feb 21 16:58:35 2016
@@ -257,7 +257,7 @@ bool Thumb2ITBlockPass::InsertITInstruct
// Finalize the bundle.
finalizeBundle(MBB, InsertPos.getInstrIterator(),
- ++LastITMI->getIterator());
+ ++LastITMI->getInstrIterator());
Modified = true;
++NumITs;
Modified: llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp Sun Feb 21 16:58:35 2016
@@ -591,7 +591,7 @@ void HexagonAsmPrinter::EmitInstruction(
if (MI->isBundle()) {
const MachineBasicBlock* MBB = MI->getParent();
- MachineBasicBlock::const_instr_iterator MII = MI->getIterator();
+ auto MII = MI->getInstrIterator();
unsigned IgnoreCount = 0;
for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII)
Modified: llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp Sun Feb 21 16:58:35 2016
@@ -1295,7 +1295,7 @@ bool HexagonHardwareLoops::orderBumpComp
// Out of order.
unsigned PredR = CmpI->getOperand(0).getReg();
bool FoundBump = false;
- instr_iterator CmpIt = CmpI->getIterator(), NextIt = std::next(CmpIt);
+ instr_iterator CmpIt = CmpI->getInstrIterator(), NextIt = std::next(CmpIt);
for (instr_iterator I = NextIt, E = BB->instr_end(); I != E; ++I) {
MachineInstr *In = &*I;
for (unsigned i = 0, n = In->getNumOperands(); i < n; ++i) {
@@ -1307,7 +1307,7 @@ bool HexagonHardwareLoops::orderBumpComp
}
if (In == BumpI) {
- BB->splice(++BumpI->getIterator(), BB, CmpI->getIterator());
+ BB->splice(++BumpI->getInstrIterator(), BB, CmpI->getInstrIterator());
FoundBump = true;
break;
}
Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Sun Feb 21 16:58:35 2016
@@ -520,7 +520,7 @@ bool HexagonInstrInfo::AnalyzeBranch(Mac
// executed, so remove it.
if (SecLastOpcode == Hexagon::J2_jump && LastOpcode == Hexagon::J2_jump) {
TBB = SecondLastInst->getOperand(0).getMBB();
- I = LastInst->getIterator();
+ I = LastInst->getInstrIterator();
if (AllowModify)
I->eraseFromParent();
return false;
@@ -1260,7 +1260,7 @@ bool HexagonInstrInfo::PredicateInstruct
for (unsigned i = 0, n = T->getNumOperands(); i < n; ++i)
MI->addOperand(T->getOperand(i));
- MachineBasicBlock::instr_iterator TI = T->getIterator();
+ auto TI = T->getInstrIterator();
B.erase(TI);
MachineRegisterInfo &MRI = B.getParent()->getRegInfo();
Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Sun Feb 21 16:58:35 2016
@@ -173,9 +173,8 @@ void MipsAsmPrinter::EmitInstruction(con
return;
}
-
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
do {
// Do any auto-generated pseudo lowerings.
Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Sun Feb 21 16:58:35 2016
@@ -267,8 +267,8 @@ void SparcAsmPrinter::EmitInstruction(co
LowerGETPCXAndEmitMCInsts(MI, getSubtargetInfo());
return;
}
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
do {
MCInst TmpInst;
LowerSparcMachineInstrToMCInst(&*I, TmpInst, *this);
Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=261504&r1=261503&r2=261504&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FrameLowering.cpp Sun Feb 21 16:58:35 2016
@@ -462,7 +462,9 @@ void X86FrameLowering::inlineStackProbe(
}
if (ChkStkStub != nullptr) {
- MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
+ // FIXME: MBBI is a bundle iterator. Should this be getBundleIterator()?
+ MachineBasicBlock::iterator MBBI =
+ std::next(ChkStkStub->getInstrIterator());
assert(std::prev(MBBI).operator==(ChkStkStub) &&
"MBBI expected after __chkstk_stub.");
DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
More information about the llvm-commits
mailing list