[PATCH] D17328: [mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructions

[Simon Dardis via llvm-commits]

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I believe the changes to test/MC/Mips/{mips32r5mips32r6,mips64r5,mips64r6}/invalid.s while welcome are unnecessary given that this patch deals with microMIPSR6. Those should be split out as a separate patch.

I've noticed a possible error in the documentation that shows dmtc2 as syntactically taking a selector but having no field for encoding it in the binary instruction. In contrast mtc2 and mthc2 do not syntactically have a selector. I'm awaiting clarification on that issue.

Thanks,
Simon


================
Comment at: lib/Target/Mips/MicroMips32r6InstrInfo.td:556
@@ +555,3 @@
+      string instr_asm, RegisterOperand DstRC, RegisterOperand SrcRC,
+      InstrItinClass Itin = NoItinerary,SDPatternOperator OpNode = null_frag> {
+  dag InOperandList = (ins SrcRC:$rt);
----------------
Space after "NoItinerary,"

================
Comment at: test/MC/Disassembler/Mips/micromips32r6/valid.txt:266
@@ +265,2 @@
+0x55 0x6c 0x38 0x3b # CHECK: mthc1 $11, $f12
+0x01 0xae 0x9d 0x3c # CHECK: $13, $14
----------------
Missing instruction on the last line. I presume it's mthc2.

Also can you add the cases with no selector, i.e. "mtc0 $5, $9", "mthc0 $5, $9".

================
Comment at: test/MC/Disassembler/Mips/micromips64r6/valid.txt:172
@@ -171,1 +171,3 @@
 0x00 0x0f 0x47 0x7c # CHECK: di $15
+0x59 0xf0 0x02 0xfc # CHECK: dmtc0 $15, $16, 0
+0x5a 0x32 0x2a 0xfc # CHECK: dmtc0 $17, $18, 5
----------------
No selector case here too.

Also can you add the mt* cases as well here.

================
Comment at: test/MC/Mips/micromips64r6/invalid.s:134
@@ -133,1 +133,3 @@
   swm16 $16, $17, $ra, 64($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  dmtc0  $4, $3, -1        # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
+  dmtc0  $4, $3, 8         # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
----------------
Add mtc0, mthc0 cases here.

================
Comment at: test/MC/Mips/micromips64r6/valid.s:157
@@ -156,1 +156,3 @@
         floor.l.d $f1, $f3       # CHECK: floor.l.d $f1, $f3      # encoding: [0x54,0x23,0x43,0x3b]
+        dmtc0 $15, $16           # CHECK: dmtc0 $15, $16, 0       # encoding: [0x59,0xf0,0x02,0xfc]
+        dmtc0 $17, $18, 5        # CHECK: dmtc0 $17, $18, 5       # encoding: [0x5a,0x32,0x2a,0xfc]
----------------
Can you add the mt* cases here too?


http://reviews.llvm.org/D17328