[llvm] r259177 - Since LI/LIS sign extend the constant passed into the instruction we should
Eric Christopher via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 3 10:02:20 PST 2016
Hi Hans,
Would you please pull this into the 3.8 release as well?
Thanks!
-eric
On Thu, Jan 28, 2016 at 11:24 PM Eric Christopher via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
> Author: echristo
> Date: Fri Jan 29 01:20:01 2016
> New Revision: 259177
>
> URL: http://llvm.org/viewvc/llvm-project?rev=259177&view=rev
> Log:
> Since LI/LIS sign extend the constant passed into the instruction we should
> check that the sign extended constant fits into 16-bits if we want a
> zero extended value, otherwise go ahead and put it together piecemeal.
>
> Fixes PR26356.
>
> Modified:
> llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
> llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=259177&r1=259176&r2=259177&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp Fri Jan 29 01:20:01 2016
> @@ -2098,7 +2098,9 @@ unsigned PPCFastISel::PPCMaterializeInt(
> BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc),
> ImmReg)
> .addImm(CI->getSExtValue());
> return ImmReg;
> - } else if (!UseSExt && isUInt<16>(CI->getZExtValue())) {
> + } else if (!UseSExt && isUInt<16>(CI->getSExtValue())) {
> + // Since LI will sign extend the constant we need to make sure that
> for
> + // our zeroext constants that the sign extended constant fits into
> 16-bits.
> unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI;
> unsigned ImmReg = createResultReg(RC);
> BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc),
> ImmReg)
> @@ -2108,7 +2110,6 @@ unsigned PPCFastISel::PPCMaterializeInt(
>
> // Construct the constant piecewise.
> int64_t Imm = CI->getZExtValue();
> -
> if (VT == MVT::i64)
> return PPCMaterialize64BitInt(Imm, RC);
> else if (VT == MVT::i32)
>
> Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll?rev=259177&r1=259176&r2=259177&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll (original)
> +++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll Fri Jan 29 01:20:01
> 2016
> @@ -186,3 +186,12 @@ entry:
> ; ELF64: blr
> ret i32 -1
> }
> +
> +define zeroext i16 @ret20() nounwind {
> +entry:
> +; ELF64-LABEL: ret20
> +; ELF64: lis{{.*}}0
> +; ELF64: ori{{.*}}32768
> +; ELF64: blr
> + ret i16 32768
> +}
>
>
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