<div dir="ltr">Hi Hans,<div><br></div><div>Would you please pull this into the 3.8 release as well?</div><div><br></div><div>Thanks!</div><div><br></div><div>-eric<br><br><div class="gmail_quote"><div dir="ltr">On Thu, Jan 28, 2016 at 11:24 PM Eric Christopher via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: echristo<br>
Date: Fri Jan 29 01:20:01 2016<br>
New Revision: 259177<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=259177&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=259177&view=rev</a><br>
Log:<br>
Since LI/LIS sign extend the constant passed into the instruction we should<br>
check that the sign extended constant fits into 16-bits if we want a<br>
zero extended value, otherwise go ahead and put it together piecemeal.<br>
<br>
Fixes PR26356.<br>
<br>
Modified:<br>
    llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp<br>
    llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=259177&r1=259176&r2=259177&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=259177&r1=259176&r2=259177&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp Fri Jan 29 01:20:01 2016<br>
@@ -2098,7 +2098,9 @@ unsigned PPCFastISel::PPCMaterializeInt(<br>
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg)<br>
         .addImm(CI->getSExtValue());<br>
     return ImmReg;<br>
-  } else if (!UseSExt && isUInt<16>(CI->getZExtValue())) {<br>
+  } else if (!UseSExt && isUInt<16>(CI->getSExtValue())) {<br>
+    // Since LI will sign extend the constant we need to make sure that for<br>
+    // our zeroext constants that the sign extended constant fits into 16-bits.<br>
     unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI;<br>
     unsigned ImmReg = createResultReg(RC);<br>
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg)<br>
@@ -2108,7 +2110,6 @@ unsigned PPCFastISel::PPCMaterializeInt(<br>
<br>
   // Construct the constant piecewise.<br>
   int64_t Imm = CI->getZExtValue();<br>
-<br>
   if (VT == MVT::i64)<br>
     return PPCMaterialize64BitInt(Imm, RC);<br>
   else if (VT == MVT::i32)<br>
<br>
Modified: llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll?rev=259177&r1=259176&r2=259177&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll?rev=259177&r1=259176&r2=259177&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll (original)<br>
+++ llvm/trunk/test/CodeGen/PowerPC/fast-isel-ret.ll Fri Jan 29 01:20:01 2016<br>
@@ -186,3 +186,12 @@ entry:<br>
 ; ELF64: blr<br>
   ret i32 -1<br>
 }<br>
+<br>
+define zeroext i16 @ret20() nounwind {<br>
+entry:<br>
+; ELF64-LABEL: ret20<br>
+; ELF64: lis{{.*}}0<br>
+; ELF64: ori{{.*}}32768<br>
+; ELF64: blr<br>
+  ret i16 32768<br>
+}<br>
<br>
<br>
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</blockquote></div></div></div>