[PATCH] D16312: [TableGen] Add 'register alternative name matching' support
Dylan McKay via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 3 00:13:14 PST 2016
dylanmckay updated this revision to Diff 46752.
dylanmckay marked 3 inline comments as done.
dylanmckay added a comment.
Fix @hfinkel's code review points
http://reviews.llvm.org/D16312
Files:
include/llvm/Target/Target.td
utils/TableGen/AsmMatcherEmitter.cpp
Index: utils/TableGen/AsmMatcherEmitter.cpp
===================================================================
--- utils/TableGen/AsmMatcherEmitter.cpp
+++ utils/TableGen/AsmMatcherEmitter.cpp
@@ -2225,6 +2225,37 @@
OS << "}\n\n";
}
+/// Emit the function to match a string to the target
+/// specific register enum.
+static void emitMatchRegisterAltName(CodeGenTarget &Target, Record *AsmParser,
+ raw_ostream &OS) {
+ // Construct the match list.
+ std::vector<StringMatcher::StringPair> Matches;
+ const auto &Regs = Target.getRegBank().getRegisters();
+ for (const CodeGenRegister &Reg : Regs) {
+
+ auto AltNames = Reg.TheDef->getValueAsListOfStrings("AltNames");
+
+ for (auto AltName : AltNames) {
+ AltName = StringRef(AltName).trim();
+
+ // don't handle empty alternative names
+ if (AltName.empty())
+ continue;
+
+ Matches.emplace_back(AltName,
+ "return " + utostr(Reg.EnumValue) + ";");
+ }
+ }
+
+ OS << "static unsigned MatchRegisterAltName(StringRef Name) {\n";
+
+ StringMatcher("Name", Matches, OS).Emit();
+
+ OS << " return 0;\n";
+ OS << "}\n\n";
+}
+
static const char *getMinimalTypeForRange(uint64_t Range) {
assert(Range <= 0xFFFFFFFFFFFFFFFFULL && "Enum too large");
if (Range > 0xFFFFFFFFULL)
@@ -2756,6 +2787,9 @@
if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName"))
emitMatchRegisterName(Target, AsmParser, OS);
+ if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterAltName"))
+ emitMatchRegisterAltName(Target, AsmParser, OS);
+
OS << "#endif // GET_REGISTER_MATCHER\n\n";
OS << "\n#ifdef GET_SUBTARGET_FEATURE_NAME\n";
Index: include/llvm/Target/Target.td
===================================================================
--- include/llvm/Target/Target.td
+++ include/llvm/Target/Target.td
@@ -937,6 +937,14 @@
// written register name matcher
bit ShouldEmitMatchRegisterName = 1;
+ // Set to true if the target needs a generated 'alternative register name'
+ // matcher.
+ //
+ // This generates a function which can be used to lookup registers from
+ // their aliases. This function will fail when called on targets where
+ // several registers share the same alias (i.e. not a 1:1 mapping).
+ bit ShouldEmitMatchRegisterAltName = 0;
+
// HasMnemonicFirst - Set to false if target instructions don't always
// start with a mnemonic as the first token.
bit HasMnemonicFirst = 1;
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